PIC18F27J53-I/SP Microchip Technology, PIC18F27J53-I/SP Datasheet - Page 124

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PIC18F27J53-I/SP

Manufacturer Part Number
PIC18F27J53-I/SP
Description
IC PIC MCU 128KB FLASH 28SPDIP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F27J53-I/SP

Program Memory Type
FLASH
Program Memory Size
128KB (64K x 16)
Package / Case
*
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.8 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
16
Number Of Timers
8
Operating Supply Voltage
2.15 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Minimum Operating Temperature
- 40 C
Controller Family/series
PIC18
Cpu Speed
48MHz
Embedded Interface Type
I2C, SPI, USART
Digital Ic Case Style
DIP
Supply Voltage Range
1.8V To 5.5V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F27J53-I/SP
Manufacturer:
MITSUBISHI
Quantity:
12
PIC18F47J53 FAMILY
REGISTER 9-2:
DS39964B-page 124
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note:
R/W-1
RBPU
Interrupt flag bits are set when an interrupt condition occurs, regardless of the state of its corresponding
enable bit or the global interrupt enable bit. User software should ensure the appropriate interrupt flag bits
are clear prior to enabling an interrupt. This feature allows for software polling.
RBPU: PORTB Pull-up Enable bit
1 = All PORTB pull-ups are disabled
0 = PORTB pull-ups are enabled by individual port latch values
INTEDG0: External Interrupt 0 Edge Select bit
1 = Interrupt on rising edge
0 = Interrupt on falling edge
INTEDG1: External Interrupt 1 Edge Select bit
1 = Interrupt on rising edge
0 = Interrupt on falling edge
INTEDG2: External Interrupt 2 Edge Select bit
1 = Interrupt on rising edge
0 = Interrupt on falling edge
INTEDG3: External Interrupt 3 Edge Select bit
1 = Interrupt on rising edge
0 = Interrupt on falling edge
TMR0IP: TMR0 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
INT3IP: INT3 External Interrupt Priority bit
1 = High priority
0 = Low priority
RBIP: RB Port Change Interrupt Priority bit
1 = High priority
0 = Low priority
INTEDG0
R/W-1
INTCON2: INTERRUPT CONTROL REGISTER 2 (ACCESS FF1h)
W = Writable bit
‘1’ = Bit is set
INTEDG1
R/W-1
INTEDG2
R/W-1
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
INTEDG3
R/W-1
TMR0IP
R/W-1
 2010 Microchip Technology Inc.
x = Bit is unknown
INT3IP
R/W-1
R/W-1
RBIP
bit 0

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