PIC18F27J53-I/SP Microchip Technology, PIC18F27J53-I/SP Datasheet - Page 332

• Manufacturer Part Number: PIC18F27J53-I/SP
• Description: IC PIC MCU 128KB FLASH 28SPDIP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F27J53-I/SP

• Program Memory Type: FLASH
• Program Memory Size: 128KB (64K x 16)
• Package / Case: *
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 48MHz
• Connectivity: I²C, LIN, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 2.15 V ~ 3.6 V
• Data Converters: A/D 10x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 3.8 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 48 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 8
• Operating Supply Voltage: 2.15 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: - 40 C
• Controller Family/series: PIC18
• Cpu Speed: 48MHz
• Embedded Interface Type: I2C, SPI, USART
• Digital Ic Case Style: DIP
• Supply Voltage Range: 1.8V To 5.5V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC18F47J53 FAMILY
20.5.7.1
Because MSSP1 and MSSP2 are independent, they
can operate simultaneously in I
different baud rates. This is done by using different
BRG reload values for each module.
FIGURE 20-19:
TABLE 20-3:
DS39964B-page 332
Note 1:
40 MHz
40 MHz
40 MHz
16 MHz
16 MHz
16 MHz
4 MHz
4 MHz
4 MHz
F
OSC
The I
100 kHz) in all details, but may be used with care where higher rates are required by the application.
Baud Rate and Module
Interdependence
2
C interface does not conform to the 400 kHz I
I
2
C™ CLOCK RATE w/BRG
BAUD RATE GENERATOR BLOCK DIAGRAM
SSPM<3:0>
10 MHz
10 MHz
10 MHz
SCLx
4 MHz
4 MHz
4 MHz
1 MHz
1 MHz
1 MHz
F
2
C Master mode at
CY
SSPM<3:0>
Control
Reload
Preliminary
CLKO
20 MHz
20 MHz
20 MHz
F
8 MHz
8 MHz
8 MHz
2 MHz
2 MHz
2 MHz
CY
* 2
Reload
2
Because this mode derives its basic clock source from
the system clock, any changes to the clock will affect
both modules in the same proportion. It may be
possible to change one or both baud rates back to a
previous value by changing the BRG reload value.
BRG Down Counter
C specification (which applies to rates greater than
SSPxADD<6:0>
BRG Value
0Ch
18h
1Fh
63h
09h
27h
02h
09h
00h
 2010 Microchip Technology Inc.
F
OSC
/4
(2 Rollovers of BRG)
400 kHz
400 kHz
333 kHz
312.5 kHz
1 MHz
100 kHz
308 kHz
100 kHz
100 kHz
F
SCL
(1)
(1)
(1)
(1)