MC9S12E64CFUE Freescale Semiconductor, MC9S12E64CFUE Datasheet - Page 548

• Manufacturer Part Number: MC9S12E64CFUE
• Description: IC MCU 64K FLASH 25MHZ 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12E64CFUE

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: EBI/EMI, I²C, SCI, SPI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 60
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 2.75 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-QFP
• Package: 80PQFP
• Family Name: HCS12
• Maximum Speed: 25 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 60
• Interface Type: SCI/SPI
• On-chip Adc: 16-chx10-bit
• On-chip Dac: 2-chx8-bit
• Number Of Timers: 12
• Processor Series: S12E
• Core: HCS12
• Data Ram Size: 4 KB
• Maximum Clock Frequency: 25 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Minimum Operating Temperature: - 40 C
• Controller Family/series: HCS12/S12X
• No. Of I/o's: 58
• Ram Memory Size: 4KB
• Cpu Speed: 25MHz
• No. Of Timers: 4
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• For Use With: M68EVB912E128 - BOARD EVAL FOR MC9S12E128/64
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Chapter 19 Module Mapping Control (MMCV4)
19.3.2.2
Read: Anytime
Write: Once in normal and emulation modes and anytime in special modes
This register initializes the position of the internal registers within the on-chip system memory map. The
registers occupy either a 1K byte or 2K byte space and can be mapped to any 2K byte space within the first
32K bytes of the system’s address space.
548
REG[14:11]
Reset
Field
6:3
W
R
Internal Register Map Position — These four bits in combination with the leading zero supplied by bit 7 of
INITRG determine the upper five bits of the base address for the system’s internal registers (i.e., the minimum
base address is 0x0000 and the maximum is 0x7FFF).
Initialization of Internal Registers Position Register (INITRG)
0
0
7
Figure 19-4. Initialization of Internal Registers Position Register (INITRG)
= Unimplemented or Reserved
REG14
0
6
Table 19-3. INITRG Field Descriptions
REG13
MC9S12E128 Data Sheet, Rev. 1.07
0
5
REG12
0
4
Description
REG11
0
3
0
0
2
Freescale Semiconductor
0
0
1
0
0
0