HD64F7044F28V Renesas Electronics America, HD64F7044F28V Datasheet - Page 89

• Manufacturer Part Number: HD64F7044F28V
• Description: IC SUPERH MCU FLASH 112QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7040r

Specifications of HD64F7044F28V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 28.7MHz
• Connectivity: EBI/EMI, SCI
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 112-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

4.13.2
Table 4.26 shows the instruction. The correspondence between the operands and registers is the
same as for ALU fixed decimal point operations. It is shown in table 4.27.
Table 4.26 Rounding Instruction
Table 4.27 Correspondence between Operands and Registers for Rounding Instruction
Note: Yes: Register can be used with operand.
4.13.3
The DC bit is updated as follows depending on the mode specified by the CS bits. Condition bits
are updated as for ALU fixed decimal point arithmetic operations.
Carry/Borrow Mode: CS2–CS0 = 000: The DC bit is set to 1 when a carry or borrow from the
MSB of the operation result occurs; otherwise, it is set to 0.
Negative Mode: CS2–CS0 = 001: Set to 1 for a negative operation result and 0 for a positive
operation result. In this mode, the DC bit has the same value as bit N.
Zero Mode: CS2–CS0 = 010: The DC bit is 1 when the operation result is zero; otherwise, the
DC bit is 0. In this mode, the DC bit has the same value as bit Z.
Overflow Mode: CS2–CS0 = 011: The DC bit is set to 1 by an overflow; otherwise, it is set to 0.
In this mode, the DC bit has the same value as bit V.
Signed Greater Than Mode: CS2–CS0 = 100: Set to 1 for a positive operation result; otherwise,
it is set to 0. In this mode, the DC bit has the same value as bit GT.
Signed Greater Than or Equal To Mode: CS2–CS0 = 101: Set to 1 for a positive or zero
operation result; otherwise, it is set to 0.
Mnemonic
PRND
Operand
Sx
Sy
Dz
Instructions and Operands
DC Bit
X0
Yes
Yes
Function
Rounding
X1
Yes
Yes
Y0
Yes
Yes
Y1
Yes
Yes
Source 1
Sx
—
M0
Yes
Yes
Rev. 5.00 Jun 30, 2004 page 73 of 512
Source 2
—
Sy
Section 4 Instruction Features
M1
Yes
Yes
REJ09B0171-0500O
A0
Yes
Yes
Destination
Dz
Dz
A1
Yes
Yes