PIC18F45J10-I/PT Microchip Technology, PIC18F45J10-I/PT Datasheet - Page 357

• Manufacturer Part Number: PIC18F45J10-I/PT
• Description: IC PIC MCU FLASH 16KX16 44TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18F45J10-I/PT

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Number Of I /o: 32
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 13x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Controller Family/series: PIC18
• No. Of I/o's: 32
• Ram Memory Size: 1KB
• Cpu Speed: 40MHz
• No. Of Timers: 3
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1024 B
• Interface Type: MSSP, SPI, I2C, EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Maximum Operating Temperature: + 100 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM163022, DM183040
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 13 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC162074 - HEADER INTRFC MPLAB ICD2 44TQFPMA180013 - MODULE PLUG-IN 18F45J10 44TQFPAC162067 - HEADER INTRFC MPLAB ICD2 40/28PAC164330 - MODULE SKT FOR 44TQFP 18F45J10
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Timing Diagrams and Specifications
© 2008 Microchip Technology Inc.
Transition for Wake From Sleep ................................ 34
Transition From RC_RUN Mode to
Transition to RC_RUN Mode ..................................... 33
A/D Conversion Requirements ................................ 331
AC Characteristics
Capture/Compare/PWM Requirements
CLKO and I/O Requirements ................................... 317
EUSART Synchronous Receive Requirements ....... 329
EUSART Synchronous Transmission
Example SPI Mode Requirements
Example SPI Mode Requirements (CKE = 1) .......... 322
Example SPI Slave Mode Requirements
External Clock Requirements .................................. 315
I
I
Master SSP I
Master SSP I
Parallel Slave Port Requirements ............................ 320
PLL Clock ................................................................. 316
Reset, Watchdog Timer, Oscillator Start-up
Timer0 and Timer1 External
2
2
C Bus Data Requirements (Slave Mode) .............. 326
C Bus Start/Stop Bits Requirements
PRI_RUN Mode ................................................. 33
Internal RC Accuracy ....................................... 316
(Including ECCP Module) ................................ 320
Requirements .................................................. 329
(CKE = 0) ................................................. 321, 323
(CKE = 1) ......................................................... 324
(Slave Mode) ................................................... 325
Requirements .................................................. 327
Reset Requirements ........................................ 318
Clock Requirements ........................................ 319
Timer, Power-up Timer and Brown-out
2
2
C Bus Data Requirements ................ 328
C Bus Start/Stop Bits
PIC18F45J10 FAMILY
Top-of-Stack Access .......................................................... 49
TRISE Register
TSTFSZ ........................................................................... 285
Two-Speed Start-up ................................................. 231, 240
Two-Word Instructions
TXSTA Register
V
Voltage Reference Specifications .................................... 312
Voltage Regulator (On-Chip) ........................................... 239
W
Watchdog Timer (WDT) ........................................... 231, 238
WCOL ...................................................... 176, 177, 178, 181
WCOL Status Flag ................................... 176, 177, 178, 181
WWW Address ................................................................ 357
WWW, On-Line Support ...................................................... 6
X
XORLW ........................................................................... 285
XORWF ........................................................................... 286
PSPMODE Bit ......................................................... 103
Example Cases ......................................................... 53
BRGH Bit ................................................................. 193
Associated Registers ............................................... 238
Control Register ....................................................... 238
During Oscillator Failure .......................................... 241
Programming Considerations .................................. 238
DS39682D-page 355