PIC18F1320-E/P Microchip Technology, PIC18F1320-E/P Datasheet - Page 5
![IC MCU FLASH 4KX16 EEPROM 18DIP](/photos/6/76/67657/18-dip_300mil__sml.jpg)
PIC18F1320-E/P
Manufacturer Part Number
PIC18F1320-E/P
Description
IC MCU FLASH 4KX16 EEPROM 18DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F1220-ISO.pdf
(308 pages)
3.PIC18F1220-ISO.pdf
(8 pages)
4.PIC18F1220-ISO.pdf
(6 pages)
5.PIC18F1220-ISO.pdf
(10 pages)
6.PIC18F1220-ISO.pdf
(4 pages)
7.PIC18F1320-ISS.pdf
(36 pages)
8.PIC18F1220-EP.pdf
(310 pages)
Specifications of PIC18F1320-E/P
Program Memory Type
FLASH
Program Memory Size
8KB (4K x 16)
Package / Case
18-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
16
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
16
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163014, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
7-ch x 10-bit
Package
18PDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA18XP180 - DEVICE ADAPTER 18F1320 PDIP 18LDACICE0202 - ADAPTER MPLABICE 18P 300 MIL
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
2.3
The code memory space extends from 0000h to 1FFFh
(8 Kbytes) in a single 8-Kbyte panel. Addresses 0000h
through 01FFh, however, define a “Boot Block” region
that is treated separately from Panel 1. All code
memory is on-chip.
A user may store identification information (ID) in eight
ID registers. These ID registers are mapped in
addresses 200000h through 200007h. The ID locations
read out normally, even after code protection is applied.
TABLE 2-2:
FIGURE 2-7:
2010 Microchip Technology Inc.
PIC18F1220
PIC18F2220
PIC18F4220
PIC18F1320
PIC18F2320
PIC18F4320
3FFFFEh
3FFFFFh
200000h
200001h
200002h
200003h
200004h
200005h
200006h
200007h
300000h
300001h
300002h
300003h
Memory Map
Device
IMPLEMENTATION OF CODE MEMORY
ID Location 1
ID Location 2
ID Location 3
ID Location 4
ID Location 5
ID Location 6
ID Location 7
ID Location 8
MEMORY MAP FOR PIC18FX220/X320
CONFIG1H
CONFIG2H
Device ID 1
Device ID 2
CONFIG1L
CONFIG2L
Code Memory Size (Bytes)
0000h-0FFFh (4K)
0000h-0FFFh (4K)
0000h-0FFFh (4K)
0000h-1FFFh (8K)
0000h-1FFFh (8K)
0000h-1FFFh (8K)
3FFFFFh
200000h
07FFh
0FFFh
17FFh
1FFFh
0000h
200h
Locations 300001h through 30000Dh are reserved
for the Configuration Words. These Words may be
set to select various device options and are
described in Section 5.0 “Configuration Word”.
These Configuration Words read out normally, even
after code protection.
Locations 3FFFFEh and 3FFFFFh are reserved for the
Device ID Words. These Words may be used by the
programmer to identify what device type is being
programmed and are described in Section 5.0
“Configuration Word”. These Configuration Words
read out normally, even after code protection.
Unimplemented
PIC18FX320
Read as ‘0’s
PIC18FX220/X320
Boot Block
8 Kbytes
Block 0
Block 1
Block 2
Block 3
Data EEPROM Size (Bytes)
000-0FFh (256)
000-0FFh (256)
000-0FFh (256)
000-0FFh (256)
000-0FFh (256)
000-0FFh (256)
Unimplemented
PIC18FX220
Read as ‘0’s
Boot Block
4 Kbytes
Block 0
Block 1
DS39592F-page 5