PIC18F1320-E/P Microchip Technology, PIC18F1320-E/P Datasheet - Page 9
![IC MCU FLASH 4KX16 EEPROM 18DIP](/photos/6/76/67657/18-dip_300mil__sml.jpg)
PIC18F1320-E/P
Manufacturer Part Number
PIC18F1320-E/P
Description
IC MCU FLASH 4KX16 EEPROM 18DIP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F1220-ISO.pdf
(308 pages)
3.PIC18F1220-ISO.pdf
(8 pages)
4.PIC18F1220-ISO.pdf
(6 pages)
5.PIC18F1220-ISO.pdf
(10 pages)
6.PIC18F1220-ISO.pdf
(4 pages)
7.PIC18F1320-ISS.pdf
(36 pages)
8.PIC18F1220-EP.pdf
(310 pages)
Specifications of PIC18F1320-E/P
Program Memory Type
FLASH
Program Memory Size
8KB (4K x 16)
Package / Case
18-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
16
Eeprom Size
256 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
EUSART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
16
Number Of Timers
4
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DM163014, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
7-ch x 10-bit
Package
18PDIP
Device Core
PIC
Family Name
PIC18
Maximum Speed
40 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DVA18XP180 - DEVICE ADAPTER 18F1320 PDIP 18LDACICE0202 - ADAPTER MPLABICE 18P 300 MIL
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
FIGURE 2-12:
2.7.2
The core instruction passes a 16-bit instruction to the
CPU core for execution. This is needed to set up
registers, as appropriate for use with other commands.
If the instruction is a 1-word, 1-cycle instruction, it will
be executed while the next command is clocked in.
2010 Microchip Technology Inc.
PGC
PGD
4-Bit Command (LSb first)
P3
CORE INSTRUCTION
1
P2
1
2
0
P4
3
1
TABLE WRITE, POST-INCREMENT TIMING
4
1
P2A
P5
P2B
1
0
2
0
0
3
0
4
0
5
0
16-Bit Data Payload (LSb first)
6
0
PGD = Input
4
7
1
8
0
9
0
If the instruction is a 2-word, 2-cycle instruction,
another core instruction command is required with the
second word of the instruction. The instruction will
complete when a third 4-bit command has been
loaded.
10
0
C
11
1
PIC18FX220/X320
12
1
(1101
13
1
14
)
1
3
15
0
16
0
P5A
Fetch Next 4-Bit Command
1
n
2
n
DS39592F-page 9
3
n
4
n