PIC18F27J53-I/ML Microchip Technology, PIC18F27J53-I/ML Datasheet - Page 451
![IC PIC MCU 128KB FLASH 28QFN](/photos/18/33/183309/qfn-28_sml.jpg)
PIC18F27J53-I/ML
Manufacturer Part Number
PIC18F27J53-I/ML
Description
IC PIC MCU 128KB FLASH 28QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18LF24J10-ISS.pdf
(32 pages)
2.PIC18F26J13-ISS.pdf
(496 pages)
3.PIC18F26J53-ISS.pdf
(586 pages)
4.PIC18F26J53-ISS.pdf
(12 pages)
Specifications of PIC18F27J53-I/ML
Program Memory Type
FLASH
Program Memory Size
128KB (64K x 16)
Package / Case
*
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.8 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
16
Number Of Timers
8
Operating Supply Voltage
2.15 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Controller Family/series
PIC18
Cpu Speed
48MHz
Embedded Interface Type
I2C, SPI, USART
Digital Ic Case Style
QFN
Supply Voltage Range
1.8V To 5.5V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- PIC18LF24J10-ISS PDF datasheet
- PIC18F26J13-ISS PDF datasheet #2
- PIC18F26J53-ISS PDF datasheet #3
- PIC18F26J53-ISS PDF datasheet #4
- Current page: 451 of 496
- Download datasheet (5Mb)
FIGURE 27-13:
TABLE 27-14: EXAMPLE SPI MODE REQUIREMENTS (SLAVE MODE TIMING, CKE = 0 OR 1)
2010 Microchip Technology Inc.
70
71
72
73
74
75
76
77
80
82
83
Param.
No.
(CKP = 0)
(CKP = 1)
SDI
SDI
SS
SCK
SCK
SDO
Note:
TssL2scH,
TssL2scL
TscH
TscL
TdiV2scH,
TdiV2scL
TscH2diL,
TscL2diL
TdoR
TdoF
TssH2doZ
TscH2doV,
TscL2doV
TssL2doV
TscH2ssH,
TscL2ssH
Symbol
Refer to
SS to SCK or SCK Input
SCK Input High Time
SCK Input Low Time
Setup Time of SDI Data Input to SCK Edge
Hold Time of SDI Data Input to SCK Edge
SDO Data Output Rise Time
SDO Data Output Fall Time
SS to SDO Output High-Impedance
SDO Data Output Valid after SCK Edge
SDO Data Output Valid after SS Edge
SS after SCK edge
Figure 27-4
EXAMPLE SPI SLAVE MODE TIMING (CKE = 0)
70
80
71
for load conditions.
73
MSb In
MSb
74
Characteristic
72
75, 76
Preliminary
bit 6 - - - - - -1
bit 6 - - - -1
Continuous
Continuous
PIC18(L)F2X/4XK22
78
79
1.5 T
79
78
LSb In
LSb
Min
T
25
30
25
25
10
CY
—
—
—
—
CY
83
+ 40
77
Max
30
20
50
60
60
—
—
—
—
—
—
DS41412D-page 451
Units Conditions
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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