PIC18F27J53-I/ML Microchip Technology, PIC18F27J53-I/ML Datasheet - Page 64
![IC PIC MCU 128KB FLASH 28QFN](/photos/18/33/183309/qfn-28_sml.jpg)
PIC18F27J53-I/ML
Manufacturer Part Number
PIC18F27J53-I/ML
Description
IC PIC MCU 128KB FLASH 28QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheets
1.PIC18LF24J10-ISS.pdf
(32 pages)
2.PIC18F26J13-ISS.pdf
(496 pages)
3.PIC18F26J53-ISS.pdf
(586 pages)
4.PIC18F26J53-ISS.pdf
(12 pages)
Specifications of PIC18F27J53-I/ML
Program Memory Type
FLASH
Program Memory Size
128KB (64K x 16)
Package / Case
*
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2.15 V ~ 3.6 V
Data Converters
A/D 10x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3.8 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
16
Number Of Timers
8
Operating Supply Voltage
2.15 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Controller Family/series
PIC18
Cpu Speed
48MHz
Embedded Interface Type
I2C, SPI, USART
Digital Ic Case Style
QFN
Supply Voltage Range
1.8V To 5.5V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
- PIC18LF24J10-ISS PDF datasheet
- PIC18F26J13-ISS PDF datasheet #2
- PIC18F26J53-ISS PDF datasheet #3
- PIC18F26J53-ISS PDF datasheet #4
- Current page: 64 of 496
- Download datasheet (5Mb)
PIC18(L)F2X/4XK22
TABLE 4-2:
FIGURE 4-3:
FIGURE 4-4:
DS41412D-page 64
HSPLL
HS, XT, LP
EC, ECIO
RC, RCIO
INTIO1, INTIO2
Note 1: 66 ms (65.5 ms) is the nominal Power-up Timer (PWRT) delay.
INTERNAL RESET
INTERNAL RESET
PWRT TIME-OUT
PWRT TIME-OUT
Configuration
INTERNAL POR
OST TIME-OUT
OST TIME-OUT
INTERNAL POR
2: 2 ms is the nominal time required for the PLL to lock.
Oscillator
MCLR
MCLR
V
V
TIME-OUT IN VARIOUS SITUATIONS
DD
DD
TIME-OUT SEQUENCE ON POWER-UP (MCLR TIED TO V
TIME-OUT SEQUENCE ON POWER-UP (MCLR NOT TIED TO V
66 ms
66 ms
PWRTEN = 0
(1)
(1)
66 ms
66 ms
66 ms
+ 1024 T
ms
+ 1024 T
(2)
Power-up
(1)
(1)
(1)
OSC
OSC
Preliminary
+ 2
T
PWRT
(2)
and Brown-out
T
PWRT
1024 T
T
PWRTEN = 1
OST
1024 T
OSC
—
—
—
+ 2 ms
OSC
T
(2)
OST
2010 Microchip Technology Inc.
DD
Power-Managed Mode
, V
1024 T
DD
DD
RISE < T
1024 T
Exit from
): CASE 1
OSC
—
—
—
+ 2 ms
OSC
PWRT
(2)
)
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