PIC18F67K90-I/MRRSL Microchip Technology, PIC18F67K90-I/MRRSL Datasheet - Page 176
![MCU PIC 128K FLASH XLP 64QFN](/photos/6/81/68123/c04-066_pf_sml.jpg)
PIC18F67K90-I/MRRSL
Manufacturer Part Number
PIC18F67K90-I/MRRSL
Description
MCU PIC 128K FLASH XLP 64QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Specifications of PIC18F67K90-I/MRRSL
Core Size
8-Bit
Program Memory Size
128KB (64K x 16)
Core Processor
PIC
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
53
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Controller Family/series
PIC18
Eeprom Memory Size
1024Byte
Ram Memory Size
3828Byte
Cpu Speed
16MIPS
No. Of Timers
11
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
I2C, SPI, EUSART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
53
Number Of Timers
11
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DM163030, DM180021, DM183026-2, DM183032, DV164131, MA180027
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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PIC18F87K90 FAMILY
TABLE 11-16: PORTH FUNCTIONS
DS39957B-page 176
RH0/SEG47/
AN23
RH1/SEG46/
AN22
RH2/SEG45/
AN21
RH3/SEG44/
AN20
RH4/SEG40/
CCP9/P3C/
AN12/C2INC
RH5/SEG41/
CCP8/P3B/
AN13/C2IND
Legend:
Pin Name
O = Output, I = Input, ANA = Analog Signal, DIG = Digital Output, ST = Schmitt Trigger Buffer Input,
x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
Function
SEG47
SEG46
SEG45
SEG44
SEG40
SEG41
C2INC
C2IND
CCP9
CCP8
AN23
AN22
AN21
AN20
AN12
AN13
RH0
RH1
RH2
RH3
RH4
RH5
P3C
P3B
Setting
TRIS
0
1
1
1
0
1
1
1
0
1
1
1
0
1
1
1
0
1
1
0
1
0
1
x
0
1
1
0
1
0
1
x
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Type
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
ANA
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
I/O
ST
ST
ST
ST
ST
ST
ST
ST
—
—
Preliminary
LATH<0> data output.
PORTH<0> data input.
LCD Segment 47 output; disables all other pin functions.
A/D Input Channel 23.
Default input configuration on POR. Does not affect digital input.
LATH<1> data output.
PORTH<1> data input.
LCD Segment 46 output; disables all other pin functions.
A/D Input Channel 22. Default input configuration on POR. Does not
affect digital input.
LATH<2> data output.
PORTH<2> data input.
LCD Segment 45 output; disables all other pin functions.
A/D Input Channel 21. Default input configuration on POR. Does not
affect digital input.
LATH<3> data output.
PORTH<3> data input.
LCD Segment 44 output; disables all other pin functions.
A/D Input Channel 20.
Default input configuration on POR. Does not affect digital input.
LATH<4> data output.
PORTH<4> data input.
LCD Segment 40 output; disables all other pin functions.
CCP9 compare/PWM output. Takes priority over port data.
CCP9 capture input.
ECCP3 PWM Output C. May be configured for tri-state during
Enhanced PWM.
A/D Input Channel 12. Default input configuration on POR. Does not
affect digital input.
Comparator 2 Input C.
LATH<5> data output.
PORTH<5> data input.
LCD Segment 41 output; disables all other pin functions.
CCP8 compare/PWM output. Takes priority over port data.
CCP8 capture input.
ECCP3 PWM Output B. May be configured for tri-state during
Enhanced PWM.
A/D Input Channel 13. Default input configuration on POR. Does not
affect digital input.
Comparator 2 Input D.
Description
2010 Microchip Technology Inc.
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