PIC18F67K90-I/MRRSL Microchip Technology, PIC18F67K90-I/MRRSL Datasheet - Page 235

MCU PIC 128K FLASH XLP 64QFN

PIC18F67K90-I/MRRSL

Manufacturer Part Number
PIC18F67K90-I/MRRSL
Description
MCU PIC 128K FLASH XLP 64QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F67K90-I/MRRSL

Core Size
8-Bit
Program Memory Size
128KB (64K x 16)
Core Processor
PIC
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
53
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Controller Family/series
PIC18
Eeprom Memory Size
1024Byte
Ram Memory Size
3828Byte
Cpu Speed
16MIPS
No. Of Timers
11
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
4 KB
Interface Type
I2C, SPI, EUSART
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
53
Number Of Timers
11
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
DM163030, DM180021, DM183026-2, DM183032, DV164131, MA180027
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
18.0
PIC18F87K90 family devices have seven CCP
(Capture/Compare/PWM) modules, designated CCP4
through CCP10. All the modules implement standard
Capture, Compare and Pulse-Width Modulation (PWM)
modes.
REGISTER 18-1:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-4
bit 3-0
Note 1:
Note:
U-0
2:
CAPTURE/COMPARE/PWM
(CCP) MODULES
register is named CCPxCON and refers to
The CCP9 and CCP10 modules are not available on devices with 32 Kbytes of program memory
(PIC18FX5K90).
CCPxM<3:0> = 1011 will only reset the timer and not start A/D conversion on CCPx match.
Throughout this section, generic references
are used for register and bit names that are
the same, except for an ‘x’ variable that indi-
cates the item’s association with the specific
CCP module. For example, the control
CCP4CON through CCP10CON.
Unimplemented: Read as ‘0’
DCxB<1:0>: PWM Duty Cycle for CCPx Module bits (bit 1, bit 0)
Capture mode:
Unused.
Compare mode:
Unused.
PWM mode:
These bits are the two Least Significant bits (bit 1 and bit 0) of the 10-bit PWM duty cycle. The eight
Most Significant bits (DCxB<9:2>) of the duty cycle are found in CCPRxL.
CCPxM<3:0>: CCPx Module Mode Select bits
0000 = Capture/Compare/PWM disabled (resets CCPx module)
0001 = Reserved
0010 = Compare mode: toggle output on match (CCPxIF bit is set)
0011 = Reserved
0100 = Capture mode: every falling edge
0101 = Capture mode: every rising edge
0110 = Capture mode: every 4th rising edge
0111 = Capture mode: every 16th rising edge
1000 = Compare mode: initialize CCPx pin low; on compare match, force CCPx pin high (CCPxIF bit
1001 = Compare mode: initialize CCPx pin high; on compare match, force CCPx pin low (CCPxIF bit
1010 = Compare mode: generate software interrupt on compare match (CCPxIF bit is set, CCPx pin
1011 = Compare mode: Special Event Trigger; reset timer on CCPx match (CCPxIF bit is set)
11xx = PWM mode
U-0
CCPxCON: CCPx CONTROL REGISTER (CCP4-CCP10 MODULES)
is set)
is set)
reflects I/O state)
W = Writable bit
‘1’ = Bit is set
DCxB1
R/W-0
DCxB0
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PIC18F87K90 FAMILY
CCPxM3
R/W-0
Each CCP module contains a 16-bit register that can
operate as a 16-bit Capture register, a 16-bit Compare
register or a PWM Master/Slave Duty Cycle register.
For the sake of clarity, all CCP module operation in the
following sections is described with respect to CCP4,
but is equally applicable to CCP5 through CCP10.
Note:
The CCP9 and CCP10 modules are
disabled on the devices with 32 Kbytes of
program memory (PIC18FX5K90).
CCPxM2
R/W-0
x = Bit is unknown
CCPxM1
R/W-0
DS39957B-page 235
(1)
CCPxM0
R/W-0
(2)
bit 0

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