ST10F269Z2Q6 STMicroelectronics, ST10F269Z2Q6 Datasheet - Page 133

MCU 16BIT 256K FLASH 144PQFP

ST10F269Z2Q6

Manufacturer Part Number
ST10F269Z2Q6
Description
MCU 16BIT 256K FLASH 144PQFP
Manufacturer
STMicroelectronics
Series
ST10r
Datasheets

Specifications of ST10F269Z2Q6

Core Processor
ST10
Core Size
16-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
111
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
144-QFP
Controller Family/series
ST10
No. Of I/o's
111
Ram Memory Size
12KB
Cpu Speed
40MHz
No. Of Timers
5
Embedded Interface Type
CAN, SSC, USART
Rohs Compliant
Yes
Processor Series
ST10F26x
Core
ST10
Data Bus Width
16 bit
Data Ram Size
12 KB
Interface Type
CAN, SSC, USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
111
Number Of Timers
2 x 16 bit
Operating Supply Voltage
0.3 V to 4 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
16 bit x 10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
497-4833

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Figure 64 : Supply / Idle Current as a Function of Operating Frequency
is reduced. This results in increased impedance of the driver, which attenuates electrical noise from the connected PCB tracks. The
current specified in column “Test Conditions” is delivered in any cases.
2. This specification is not valid for outputs which are switched to open drain mode. In this case the respective output will float and the
voltage results from the external circuitry.
3. Partially tested, guaranteed by design characterization.
4. Overload conditions occur if the standard operating conditions are exceeded, i.e. the voltage on any pin exceeds the specified
range (i.e. V
supply voltage must remain within the specified limits.
5. This specification is only valid during Reset, or during Hold-mode or Adapt-mode. Port 6 pins are only affected if they are used for
CS output and if their open drain function is not enabled.
6. The maximum current may be drawn while the respective signal line remains inactive.
7. The minimum current must be drawn in order to drive the respective signal line active.
8. The power supply current is a function of the operating frequency. This dependency is illustrated in the Figure 64. These
parameters are tested at V
configured with a demultiplexed 16-bit bus, direct clock drive, 5 chip select lines and 2 segment address lines, EA pin is low during
reset. After reset, PORT 0 is driven with the value ‘00CCh’ that produces infinite execution of NOP instruction with 15 wait-states, R/
W delay, memory tristate wait state, normal ALE. Peripherals are not activated.
9. The total operating currents (sink & source) on the I/Os configured as output must not exceed
10. Idle mode supply current is a function of the operating frequency. This dependency is illustrated in the Figure 64. These
parameters are tested at V
11. This parameter value includes leakage currents. With all inputs (including pins configured as inputs) at 0V to 0.1V or at
V
12. Typical
13. Partially tested, guaranteed by design characterization using 22pF loading capacitors on crystal pins
14. Guaranteed by design characterization..
I [mA]
100
DD
50
0
– 0.1V to V
0
I
PD
OV
> V
value is 5µA @ T
DD
, V
DD
REF
+0.5V or V
= 0V, all outputs (including pins configured as outputs) disconnected.
DD
DD
max and 32MHz CPU clock with all outputs disconnected and all inputs at V
max and 32MHz CPU clock with all outputs disconnected and all inputs at VIL or VIH. The chip is
OV
A
=25°C, 20µA @ T
< -0.5V). The absolute sum of input overload currents on all port pins may not exceed 50mA. The
10
A
=85°C and 60µA @ T
20
A
=125°C.
93.6mA
52mA
|100|
30
mA.
IL
or V
f
ST10F269-T3
CPU
IH
.
I
I
I
I
CCmax
CCtyp
IDmax
IDtyp
[MHz]
133/162

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