MC9S12XDT256MAA Freescale Semiconductor, MC9S12XDT256MAA Datasheet - Page 163

• Manufacturer Part Number: MC9S12XDT256MAA
• Description: IC MCU 256K FLASH 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XDT256MAA

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 80MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 59
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.35 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 80-QFP
• Cpu Family: HCS12
• Device Core Size: 16b
• Frequency (max): 40MHz
• Interface Type: CAN/I2C/SCI/SPI
• Total Internal Ram Size: 16KB
• # I/os (max): 59
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 2.5/5V
• Operating Supply Voltage (max): 2.75/5.5V
• Operating Supply Voltage (min): 2.35/3.15V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Surface Mount
• Pin Count: 80
• Package Type: PQFP
• Processor Series: S12XD
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 59
• Number Of Timers: 12
• Operating Supply Voltage: 0 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: EVB9S12XDP512E
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Freescale Semiconductor
Note: The read portion of the left justified result data registers has been divided to show the bit position when reading 10-bit and
Unimplemente
Unimplemente
Unimplemente
ATDSTAT1
ATDDR0H
ATDDR1H
ATDDR2H
ATDDR3H
ATDDR0L
ATDDR1L
ATDDR2L
ATDDIEN
PORTAD
Register
Name
8-bit conversion data. For more detailed information refer to
(ATDDRx)”.
d
d
d
10-BIT BIT 9 MSB
10-BIT
10-BIT BIT 9 MSB
10-BIT
10-BIT BIT 9 MSB
10-BIT
10-BIT BIT 9 MSB
8-BIT
8-BIT
8-BIT
8-BIT
8-BIT
8-BIT
8-BIT
W
W
W
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
BIT 7 MSB
BIT 7 MSB
BIT 7 MSB
BIT 7 MSB
PTAD7
CCF7
BIT 1
BIT 1
BIT 1
IEN7
Bit 7
U
U
U
Figure 5-2. ATD Register Summary (Sheet 2 of 5)
= Unimplemented or Reserved
PTAD6
CCF6
BIT 8
BIT 6
BIT 0
BIT 8
BIT 6
BIT 0
BIT 8
BIT 6
BIT 0
BIT 8
BIT 6
IEN6
MC9S12XDP512 Data Sheet, Rev. 2.21
U
U
U
6
Left Justified Result Data
PTAD5
CCF5
BIT 7
BIT 5
BIT 7
BIT 5
BIT 7
BIT 5
BIT 7
BIT 5
IEN5
5
0
0
0
0
0
0
PTAD4
Section 5.3.2.13, “ATD Conversion Result Registers
CCF4
BIT 6
BIT 4
BIT 6
BIT 4
BIT 6
BIT 4
BIT 6
BIT 4
IEN4
4
0
0
0
0
0
0
Chapter 5 Analog-to-Digital Converter (S12ATD10B8CV2)
PTAD3
CCF3
BIT 5
BIT 3
BIT 5
BIT 3
BIT 5
BIT 3
BIT 5
BIT 3
IEN3
3
0
0
0
0
0
0
PTAD2
CCF2
BIT 4
BIT 2
BIT 4
BIT 2
BIT 4
BIT 2
BIT 4
BIT 2
IEN2
2
0
0
0
0
0
0
PTAD1
CCF1
BIT 3
BIT 1
BIT 3
BIT 1
BIT 3
BIT 1
BIT 3
BIT 1
IEN1
1
0
0
0
0
0
0
PTAD0
CCF0
BIT 2
BIT 0
BIT 2
BIT 0
BIT 2
BIT 0
BIT 2
BIT 0
IEN0
Bit 0
0
0
0
0
0
0
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