SAF-TC1130-L150EB-G BB Infineon Technologies, SAF-TC1130-L150EB-G BB Datasheet - Page 40

• Manufacturer Part Number: SAF-TC1130-L150EB-G BB
• Description: IC MCU 32BIT TRICOR 16KB LBGA208
• Manufacturer: Infineon Technologies
• Series: TC11xxr

Specifications of SAF-TC1130-L150EB-G BB

• Core Processor: TriCore
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, IrDA, SPI, UART/USART, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Type: ROMless
• Ram Size: 144K x 8
• Voltage - Supply (vcc/vdd): 1.43 V ~ 1.58 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-LSBGA
• Data Bus Width: 32 bit
• Program Memory Size: 32 KB
• Data Ram Size: 144 KB
• Interface Type: 3xASC, 2xSSC, I2C, 2xMLI, Ethernet 10, 100 Mbits, s, USB
• Maximum Clock Frequency: 150 MHz
• Number Of Programmable I/os: 72
• Number Of Timers: 9
• Operating Supply Voltage: 1.5 V, 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Packages: PG-LBGA-208
• Max Clock Frequency: 150.0 MHz
• Sram (incl. Cache): 144.0 KByte
• Can Nodes: 4
• Program Memory: 0.0 KByte
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: FT1130L150EBGBBXP; SAF-TC1130-L150EB-GBB; SAF-TC1130-L150EB-GBBINTR; SAF-TC1130-L150EB-GBBTR; SAF-TC1130-L150EB-GBBTR; SAFTC1130L150EBBBXT; SP000106119; SP000106538; SP000743584

The basic structure and external interconnections of the DMA are shown in
Figure 3-2
Data Sheet
Decoder
MultiCAN
Address
(Ext.Trg)
Interrupt
Control
CCU60
Control
CCU61
ASC0
ASC1
ASC2
SSC0
Clock
SSC1
USB
SCU
MLI0
MLI1
I2C
4
2
2
2
2
2
1
1
4
4
1
1
4
SR [3:0]
DMA Controller Structure and Interconnections
Request
Wiring
Matrix
DMA
f
D MA
SR [15:12]
4
8
8
Assignment
Priorisation
Request
DMA Interrupt Control Unit
Unit 0
and
DMA Sub-Block 0
Switch Control
Arbiter/
Control Engine
Transaction
Registers
Channel
DMA Controller
00-07
34
Interface 0
Interface 1
Interface 2
SMIF
Bus
M/S
Bus
M/S
Bus
Functional Description
TC1130_DMAImplementation
V1.1, 2008-12
Figure
To FPI Bus
Mem Check
TC1130
ASC0
ASC1
ASC2
SSC0
SSC1
MLI0
MLI1
IIC
3-2.