SAF-TC1130-L150EB-G BB Infineon Technologies, SAF-TC1130-L150EB-G BB Datasheet - Page 52

• Manufacturer Part Number: SAF-TC1130-L150EB-G BB
• Description: IC MCU 32BIT TRICOR 16KB LBGA208
• Manufacturer: Infineon Technologies
• Series: TC11xxr

Specifications of SAF-TC1130-L150EB-G BB

• Core Processor: TriCore
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, FIFO, I²C, IrDA, SPI, UART/USART, USB
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 72
• Program Memory Type: ROMless
• Ram Size: 144K x 8
• Voltage - Supply (vcc/vdd): 1.43 V ~ 1.58 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-LSBGA
• Data Bus Width: 32 bit
• Program Memory Size: 32 KB
• Data Ram Size: 144 KB
• Interface Type: 3xASC, 2xSSC, I2C, 2xMLI, Ethernet 10, 100 Mbits, s, USB
• Maximum Clock Frequency: 150 MHz
• Number Of Programmable I/os: 72
• Number Of Timers: 9
• Operating Supply Voltage: 1.5 V, 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Packages: PG-LBGA-208
• Max Clock Frequency: 150.0 MHz
• Sram (incl. Cache): 144.0 KByte
• Can Nodes: 4
• Program Memory: 0.0 KByte
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: FT1130L150EBGBBXP; SAF-TC1130-L150EB-GBB; SAF-TC1130-L150EB-GBBINTR; SAF-TC1130-L150EB-GBBTR; SAF-TC1130-L150EB-GBBTR; SAFTC1130L150EBBBXT; SP000106119; SP000106538; SP000743584

TC1130
Functional Description
Features:
• USB1.1 Device Standard Interface
• On-chip transceiver
• Differential I/O allow cable length up to 5m without additional hardware at target’s end.
• Hot attach
• USB1.1 full speed device
• USB protocol handling in hardware
• Clock and data recovery from USB
• Bit stripping and bit stuffing functions
• CRC5 checking, CRC16 generation and checking
• Serial to parallel data conversion
• Maintenance of data synchronization bits (DATA0/DATA1 Toggle Bits)
• Supports multiple configurations, interfaces and alternate settings
• 11 endpoints with user configurable endpoint information
• Flexible intermediate buffering of transmission data
• Powerful data handling capability, FIFO-support
• Back-to-back transfers fully supported by module automatism
• Multi-packet transfer without CPU load
• Handles data transfer with minimum CPU load
• Auto increment and single address modes selectable for easy data access
• Powerful interrupt generation
• Meets suspend power consumption restrictions in power-down mode
• Remote wakeup from USB bus activity
• Explicit support of setup information
• Enhanced status monitoring
Data Sheet
46
V1.1, 2008-12