PIC17C756-33I/L Microchip Technology, PIC17C756-33I/L Datasheet - Page 107

• Manufacturer Part Number: PIC17C756-33I/L
• Description: MICRO CTRL 16K MEMORY OTP 68PLCC
• Manufacturer: Microchip Technology
• Series: PIC® 17Cr

Specifications of PIC17C756-33I/L

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 33MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: OTP
• Ram Size: 902 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 68-PLCC
• For Use With: AC164308 - MODULE SKT FOR PM3 68PLCCDVA17XL681 - DEVICE ADAPTER FOR PIC17C752DM173001 - KIT DEVELOPMENT PICDEM17AC174007 - MODULE SKT PROMATEII 68PLCCAC164024 - ADAPTER PICSTART PLUS 68PLCC
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Eeprom Size: -

14.0
Each USART module is a serial I/O module. There are
two USART modules that are available on the
PIC17C75X. They are specified as USART1 and
USART2. The description of the operation of these
modules is generic in regard to the register names and
pin names used. Table 14-1 shows the generic names
that are used in the description of operation and the
actual names for both USART1 and USART2. Since
the control bits in each register have the same function,
their names are the same (there is no need to differen-
tiate).
The Transmit Status And Control Register (TXSTA) is
shown in Figure 14-1, while the Receive Status And
Control Register (RCSTA) is shown in Figure 14-2.
FIGURE 14-1: TXSTA1 REGISTER (ADDRESS: 15h, BANK 0)
1997 Microchip Technology Inc.
bit7
bit 7:
bit 6:
bit 5:
bit 4:
bit 3-2: Unimplemented: Read as '0'
bit 1:
bit 0:
R/W - 0 R/W - 0 R/W - 0 R/W - 0
CSRC
UNIVERSAL SYNCHRONOUS
ASYNCHRONOUS RECEIVER
TRANSMITTER (USART)
MODULES
CSRC: Clock Source Select bit
Synchronous mode:
1 = Master Mode (Clock generated internally from BRG)
0 = Slave mode (Clock from external source)
Asynchronous mode:
Don’t care
TX9: 9-bit Transmit Select bit
1 = Selects 9-bit transmission
0 = Selects 8-bit transmission
TXEN: Transmit Enable bit
1 = Transmit enabled
0 = Transmit disabled
SREN/CREN overrides TXEN in SYNC mode
SYNC: USART Mode Select bit
(Synchronous/Asynchronous)
1 = Synchronous mode
0 = Asynchronous mode
TRMT: Transmit Shift Register (TSR) Empty bit
1 = TSR empty
0 = TSR full
TX9D: 9th bit of transmit data (can be used to calculated the parity in software)
TX9
TXSTA2 REGISTER (ADDRESS: 15h, BANK 4)
TXEN
SYNC
U - 0
—
Preliminary
U - 0
—
TABLE 14-1:
Generic name
RCSTA
TXSTA
SPBRG
RCREG
TXREG
RCIE
RCIF
TXIE
TXIF
RX/DT
TX/CK
TRMT
R - 1
R/W - x
TX9D
bit0
Interrupt Control Bits
USART MODULE GENERIC
NAMES
USART1 name
RCSTA1
TXSTA1
SPBRG1
RCREG1
TXREG1
RC1IE
RC1IF
TX1IE
TX1IF
RA4/RX1/DT1
RA5/TX1/CK1
R = Readable bit
W = Writable bit
-n = Value at POR reset
Registers
Pins
(x = unknown)
DS30264A-page 107
USART2 name
RCSTA2
TXSTA2
SPBRG2
RCREG2
TXREG2
RC2IE
RC2IF
TX2IE
TX2IF
RG6/RX2/DT2
RG7/TX2/CK2