PIC17C756-33I/L Microchip Technology, PIC17C756-33I/L Datasheet - Page 243

• Manufacturer Part Number: PIC17C756-33I/L
• Description: MICRO CTRL 16K MEMORY OTP 68PLCC
• Manufacturer: Microchip Technology
• Series: PIC® 17Cr

Specifications of PIC17C756-33I/L

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 33MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: OTP
• Ram Size: 902 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 68-PLCC
• For Use With: AC164308 - MODULE SKT FOR PM3 68PLCCDVA17XL681 - DEVICE ADAPTER FOR PIC17C752DM173001 - KIT DEVELOPMENT PICDEM17AC174007 - MODULE SKT PROMATEII 68PLCCAC164024 - ADAPTER PICSTART PLUS 68PLCC
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Eeprom Size: -

TABLE 20-14: I
Note 1:
Param.
1997 Microchip Technology Inc.
D102 ‡
100
101
102
103
106
107
109
110
No.
90
91
92
§
‡
* Characterized but not tested.
2: A fast-mode I
Maximum pin capacitance = 10 pF for all I
be met. This will automatically be the case if the device does not stretch the LOW period of the SCL signal. If such a
device does stretch the LOW period of the SCL signal, it must output the next data bit to the SDA line.
Parameter # 102.+ # 107 = 1000 + 250 = 1250 ns (for 100 kHz-mode) before the SCL line is released.
This specification ensured by design. For the value required by the I
These parameters are for design guidance only and are not tested, nor characterized.
T
T
T
T
T
T
T
HD
HD
SU
SU
SU
Sym
T
T
HIGH
LOW
T
Cb
T
BUF
AA
:
:
:
:
:
R
F
DAT
STO
STA
STA
DAT
2
C BUS DATA REQUIREMENTS
2
C-bus device can be used in a standard-mode I
Characteristic
Clock high time
Clock low time
SDA and SCL
rise time
SDA and SCL
fall time
START condition
setup time
START condition
hold time
Data input
hold time
Data input
setup time
STOP condition
setup time
Output valid
from clock
Bus free time
Bus capacitive loading
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
2
C pins.
Preliminary
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
2(T
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
20 + 0.1Cb *
20 + 0.1Cb *
TBD *
TBD *
TBD *
)(BRG + 1) §
)(BRG + 1) §
)(BRG + 1) §
)(BRG + 1) §
)(BRG + 1) §
)(BRG + 1) §
)(BRG + 1) §
)(BRG + 1) §
)(BRG + 1) §
)(BRG + 1) §
)(BRG + 1) §
)(BRG + 1) §
)(BRG + 1) §
)(BRG + 1) §
)(BRG + 1) §
250 *
100 *
4.7 ‡
1.3 ‡
Min
—
—
—
—
—
—
—
—
2
0
0
C-bus system, but the parameter # 107
2
C specification, please refer to Figure E-11.
1000 *
3500 *
1000 *
300 *
300 *
300 *
300 *
100 *
0.9 *
400 *
Max
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Units
pF
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
s
s
s
s
s
s
s
s
s
s
s
s
s
s
s
s
s
s
s
Cb is specified to be from
10 to 400 pF
Cb is specified to be from
10 to 400 pF
Only relevant for repeated
START condition
After this period the first
clock pulse is generated
Note 2
Time the bus must be free
before a new transmission
can start
DS30264A-page 243
Conditions
250 ns must then