TWR-56F8257 Freescale Semiconductor, TWR-56F8257 Datasheet - Page 40

• Manufacturer Part Number: TWR-56F8257
• Description: TOWER SYSTEM KIT MC56F8257
• Manufacturer: Freescale Semiconductor
• Type: DSC, Digital Signal Controllerr

Specifications of TWR-56F8257

• Contents: Board, Cables, Documentation, DVD
• For Use With/related Products: Freescale Tower System, MC56F8257
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

General System Control Information
5.7
The operations between on-chip peripherals can be synchronized or cascaded through internal module connections to support
particular applications. Examples include synchronization between ADC sampling and PWM waveform generation for a power
conversion application, and synchronization between timer pulse outputs and DAC waveform generation for a printer
application. The user can program the internal Crossbar Switch or Comparator input multiplexes to connect one on-chip
peripheral’s outputs to other peripherals’ inputs.
5.7.1
The MC56F825x/MC56F824x includes three high-speed comparators. Each comparator input has a 4-to-1 input mux, allowing
it to sample a variety of analog sources. Some of these inputs share package pins with the on-chip ADCs; see
on page
Each comparator is paired with a dedicated, programmable, 5-bit on-chip voltage reference DAC (VREF_DAC). Optionally,
an on-chip 12-bit DAC can be internally fed to each comparator’s positive input 1 (CMPn_P1) or negative input 3 (CMPn_M3).
In addition, all three comparators’ positive input 3 (CMPn_P3) can be connected together to package pin CMP_REF. Other
inputs can be routed to package pins when the corresponding pin is configured for peripheral mode in the GPIO module.
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18.
Peripheral clocks for Quad Timers and SCIs with a high-speed (2x) option
Power-saving clock gating for peripherals
Controls for enabling/disabling functions of large regulator standby mode with write protection capability
Allowing selected peripherals to run in stop mode to generate stop recovery interrupts
Controls for programmable peripheral and GPIO connections
Software chip reset
I/O short address base location control
Peripheral protection control to provide runaway code protection for safety-critical applications
Controls for output of internal clock sources to CLKO pin
Four general-purpose software control registers that are reset only at power-on
Peripheral stop mode clocking control
Inter-Module Connections
Comparator Connections
MC56F825x/MC56F824x Digital Signal Controller, Rev. 3
Freescale Semiconductor
Table 5