LM93CIMT National Semiconductor, LM93CIMT Datasheet - Page 80

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LM93CIMT

Manufacturer Part Number
LM93CIMT
Description
Microprocessor Support IC
Manufacturer
National Semiconductor
Datasheets

Specifications of LM93CIMT

Peak Reflow Compatible (260 C)
No
Supply Voltage Max
3.6V
Leaded Process Compatible
No
Supply Voltage Min
3V
Operating Temperature Min
0��C
Package / Case
56-TSSOP
Operating Temperature Max
85°C
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Register
Address
16.0 Registers
16.9 SLEEP STATE CONTROL AND MASK REGISTERS
16.9.1 Register E4h Sleep State Control
E4h
Read/
Write
R
1:0
7:2
Bit
Sleep State
Register
(Continued)
Control
Name
Name
RES
SB
Bit 7
SB
00
01
10
11
R/W
R/W
R
Bit 6
Sleep State Control. Setting this field tells the LM93
which sleep state the system is in. Several error
events are masked depending on the state of this
field.
Reserved
Bit 5
Sleep state = S0
Do not mask errors.
Sleep state = S1
Mask errors according to S1
mask registers and standard S1
masking.
Sleep state = S3
Mask errors according to S3
mask registers and standard S3
masking.
Sleep state = S4/5
Mask errors according to S4/5
mask registers and standard
S4/5 masking. This mode is
activated automatically if the
RESET input is asserted.
80
RES
Bit 4
Description
Description
Bit 3
Bit 2
Bit 1
SB
Bit 0
Default
Value
07h

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