PIC16F767-E/ML Microchip Technology, PIC16F767-E/ML Datasheet - Page 175

IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,28PIN,PLASTIC

PIC16F767-E/ML

Manufacturer Part Number
PIC16F767-E/ML
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,LLCC,28PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 16Fr

Specifications of PIC16F767-E/ML

Rohs Compliant
YES
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
15.3
PIC16F7X7 devices have a noise filter in the MCLR
Reset path. This filter will detect and ignore small
pulses.
It should be noted that a WDT Reset does not drive
MCLR pin low.
The behavior of the ESD protection on the MCLR pin
has been altered from previous devices of this family.
Voltages applied to the pin that exceed its specification
can result in both MCLR and excessive current, beyond
the device specification, during the ESD event. For this
reason, Microchip recommends that the MCLR pin no
longer be tied directly to V
RC network, as shown in Figure 15-2, is suggested.
The MCLR/V
(default) or as an input pin (RE3). This is configured
through the MCLRE bit in Configuration Word
Register 1.
FIGURE 15-2:
15.4
A Power-on Reset pulse is generated on-chip when
V
advantage of the POR, tie the MCLR pin to V
described in Section 15.3 “MCLR”. A maximum rise
time for V
Characteristics” for details.
When the device starts normal operation (exits the
Reset condition), device operating parameters (volt-
age, frequency, temperature, ...) must be met to ensure
operation. If these conditions are not met, the device
must be held in Reset until the operating conditions are
met. For more information, see Application Note
AN607 “Power-up Trouble Shooting” (DS00607).
 2004 Microchip Technology Inc.
DD
V
rise is detected (in the range of 1.2V-1.7V). To take
DD
R1
1 k
C1
0.1 F
(optional, not critical)
MCLR
Power-on Reset (POR)
DD
(or greater)
is specified. See Section 18.0 “Electrical
PP
/RE3 pin can be configured for MCLR
RECOMMENDED MCLR
CIRCUIT
DD
MCLR
. The use of an
PIC16F7X7
DD
as
15.5
The Power-up Timer (PWRT) of the PIC16F7X7 is a
counter that uses the INTRC oscillator as the clock
input. This yields a count of 72 ms. While the PWRT is
counting, the device is held in Reset.
The power-up time delay depends on the INTRC and
will vary from chip-to-chip due to temperature and
process variation. See DC parameter #33 for details.
The PWRT is enabled by clearing configuration bit
PWRTEN.
15.6
The Oscillator Start-up Timer (OST) provides a 1024
oscillator cycle (from OSC1 input) delay after the
PWRT delay is over (if enabled). This helps to ensure
that the crystal oscillator or resonator has started and
stabilized.
The OST time-out is invoked only for XT, LP and HS
modes and only on Power-on Reset or wake-up from
Sleep.
15.7
Three configuration bits (BOREN – Configuration Word
Register 1, bit 6; BORSEN – Configuration Word
Register 2, bit 6; SBOREN – PCON register, bit 2)
together disable or enable the Brown-out Reset circuit
in one of its three operating modes.
If V
Configuration Word Register 1) for longer than T
(parameter #35, about 100 s), the brown-out situation
will reset the device. If V
than T
Once the brown-out occurs, the device will remain in
Brown-out Reset until V
Power-up Timer (if enabled) will keep the device in
Reset for T
should fall below V
Reset process will restart when V
with the Power-up Timer Reset. Unlike previous PIC16
devices, the PWRT is no longer automatically enabled
when the Brown-out Reset circuit is enabled. The
PWRTEN
independent of each other.
DD
BOR
falls below V
Power-up Timer (PWRT)
Oscillator Start-up Timer (OST)
Brown-out Reset (BOR)
, a Reset may not occur.
PWRT
and
(parameter #33, about 72 ms). If V
BOREN
BOR
BOR
(defined by BORV<1:0> bits in
during T
DD
PIC16F7X7
DD
falls below V
configuration
rises above V
PWRT
DD
DS30498C-page 173
rises above V
, the Brown-out
BOR
BOR
bits
for less
. The
BOR
BOR
are
DD

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