S1D13700F01A100 Epson, S1D13700F01A100 Datasheet - Page 189
S1D13700F01A100
Manufacturer Part Number
S1D13700F01A100
Description
Display Drivers LCD CONTROLLER
Manufacturer
Epson
Datasheet
1.S1D13700F01A100.pdf
(266 pages)
Specifications of S1D13700F01A100
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Package Type
TQFP
Pin Count
80
Mounting
Surface Mount
Operating Supply Voltage (min)
2.7V
Lead Free Status / Rohs Status
Supplier Unconfirmed
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6.4 Decoding Logic
!CS
!MEMCS16 = (Address1 >= ^h0C0000) & (Address1 <= ^h0DFFFF) & !ADDR & !CS
!WE0
!RD
6.5 Clock Input Support
6.6 LCD Panel Voltage Setting
6.7 Monochrome LCD Panel Support
6.8 Color Passive LCD Panel Support
S5U13705B00C REV. 1.0 ISA BUS EVALUATION
BOARD USER’S MANUAL (X27A-G-005-01)
All the required decode logic is provided through a PLD of type 22V10-15 (U7, socketed). This PAL
contains the following equations.
Note:ADDR = Switch S1-5 (see Table 2-1, “Configuration DIP Switch Settings,” on page 1-2).
The input clock (CLKI) frequency can be up to 50MHz for the S1D13705 if the internal clock
divide-by-2 mode is set. If the clock divider is not used, the maximum CLKI frequency is 25MHz.
There is no minimum input clock frequency.
A 25.0MHz oscillator (U2, socketed) is provided as the input clock source. However, depending on
the LCD resolution , desired frame rate, and power consumtion budget, a lower frequency clock may
be required.
The S5U13705B00C board supports both 3.3V and 5V LCD panels through the LCD connector J5.
The voltage level is selected by setting jumper J4 to the appropriate position. Refer to “Table 2-3
Jumper Settings,” on page 4-2 for setting this jumper.
Although not necessary for signal buffering, buffers have been implemented in the board design to
provide flexibility in handling 3 and 5 volt panels.
The S1D13705 directly supports 4 and 8-bit, dual and single, monochrome passive LCD panels. All
necessary signals are provided on the 40-pin ribbon cable header J5. The interface signals on the
cable are alternated with grounds to reduce crosstalk and noise.
Refer to “Table 3-1 LCD Signal Connector (J5) Pinout,” on page 4-3 for specific connection
information.
The S1D13705 directly supports 4 and 8-bit, dual and single, color passive LCD panels. All the
necessary signals are provided on the 40-pin ribbon cable header J5. The interface signals on the
cable are alternated with grounds to reduce crosstalk and noise.
Refer to “Table 3-1 LCD Signal Connector (J5) Pinout,” on page 4-3 for specific connection
information.
= (Address >= ^hC0000) & (Address <= ^hDFFFF) & !ADDR & REFRESH & ENAB
# (Address1 >= ^hF00000) & (Address1 <= ^hF1FFFF) & ADDR & REFRESH & ENAB;
# (Address1 >= ^hF00000) & (Address1 <= ^hF1FFFF) & ADDR & !CS;
= (!CS & !ADDR & !SMEMW) # (!CS & ADDR & !MEMW);
= (!CS & !ADDR & !SMEMR) # (!CS & ADDR & !MEMR);
EPSON
6: TECHNICAL DESCRIPTION
4-9
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