S1D15206F00A200 Epson, S1D15206F00A200 Datasheet - Page 63

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S1D15206F00A200

Manufacturer Part Number
S1D15206F00A200
Description
LCD Drivers LCD DRIVER
Manufacturer
Epson
Datasheet

Specifications of S1D15206F00A200

Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Part Number
Manufacturer
Quantity
Price
Part Number:
S1D15206F00A200
Manufacturer:
EPSON/爱普生
Quantity:
20 000
6. PIN DESCRIPTION
(1) Power Supply Pins
(2) System Bus Connection Pins
Rev. 1.1
V
C5
R/W (WR)
WR (R/W)
D7 to D0
E (RD)
, V
Name
RES
V
V
CS
A0
*1
DD
SS
C3
, V
C2
Connected to the +5Vdc power. Common to the V
0 Vdc pin connected to the system ground.
Multi-level power supplies for LCD driving. The voltage determined for each liquid
crystal cell is divided by resistance or it is converted in impedance by the op amp,
and supplied. These voltages must satisfy the following:
V
Three-state I/O.
The 8-bit bidirectional data buses to be connected to the 8- or 16-bit standard MPU
data buses.
Input.
Usually connected to the low-order bit of the MPU address bus and used to identify
the data or a command.
Input.
When the RES signal goes
goes
sense of the RES signal. The interface type to the 68-series or 80-series MPU is
selected by the level input as follows:
Input. Active low.
An address bus signal is usually decoded by use of chip select signal.
• If the 68-series MPU is connected:
• If the 80-series MPU is connected:
• If the 68-series MPU is connected:
• If the 80-series MPU is connected:
C5
Input. Active high.
Used as an enable clock input of the 68-series MPU.
Input. Active low.
The RD signal of the 80-series MPU is entered in this pin. When this signal is
kept low, the S1D15210 data bus is in the output status.
Input.
Used as an input pin of read control signals (if R/W is high) or write control
signals (if low).
Input. Active low.
The WR signal of the 80-series MPU is entered in this pin. A signal on the data
bus is fetched at the rising edge of WR signal.
Low level (0): D0 to D7 are display control data.
High level (1): D0 to D7 are display data.
High level: 68-series MPU interface
Low level: 80-series MPU interface
V
C3
, the 80-series MPU is initialized. The system is reset during edge
V
C2
V
SS
EPSON
the 68-series MPU is initialized, and when it
Description
CC
MPU power pin.
S1D15210 Series
3–5

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