CS5376A-IQZ Cirrus Logic Inc, CS5376A-IQZ Datasheet - Page 59

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CS5376A-IQZ

Manufacturer Part Number
CS5376A-IQZ
Description
IC,Digital Filter,QFP,64PIN,PLASTIC
Manufacturer
Cirrus Logic Inc
Datasheet

Specifications of CS5376A-IQZ

Filter Type
Digital
Number Of Filters
4
Max-order
2nd
Voltage - Supply
3 V ~ 5 V
Mounting Type
Surface Mount
Package / Case
64-TQFP, 64-VQFP
Package
64TQFP
Operating Temperature
-40 to 85 °C
Resolution (bits)
24bit
Conversion Rate
4kSPS
Operating Temperature Range
-40°C To +85°C
No. Of Pins
64
Msl
MSL 3 - 168 Hours
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1778 - EVALUATION BOARD FOR CS5376
Frequency - Cutoff Or Center
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CS5376A-IQZ
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
Part Number:
CS5376A-IQZ
Manufacturer:
CIRRUS
Quantity:
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Part Number:
CS5376A-IQZR
Manufacturer:
Cirrus Logic Inc
Quantity:
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15.GAIN AND OFFSET CORRECTION
The CS5376A digital filter can apply independent
gain and offset corrections to the data of each mea-
surement channel. Also, an offset calibration algo-
rithm can automatically calculate offset correction
values for each channel.
Gain correction values are written to the GAINx
registers (0x21-0x24), while offset correction val-
ues are written to the OFFSETx registers (0x25-
0x28). Gain and offset corrections are enabled by
the USEGR and USEOR bits in the FILTCFG reg-
ister (0x20).
When enabled, the offset calibration algorithm will
automatically calculate offset correction values for
each channel and write them into the OFFSETx
registers. Offset calibration is enabled by writing
the EXP and ORCAL bits in FILTCFG.
15.1 Gain Correction
Gain correction in the CS5376A normalizes sensor
gains in multi-sensor networks. It requires exter-
DS612F4
Gain
Correction
4
Offset
Calibration
4
MDI Input
512 kHz
Correction
Offset
4
4
SINC
Filter
Figure 30. Gain and Offset Correction
FIR
Filters
Output to High Speed Serial Data Port (SD Port)
nally calculated correction values to be written into
the GAINx registers (0x21-0x24).
Gain correction values are 24-bit two’s comple-
ment with unity gain defined as full scale,
0x7FFFFF. Gain correction always scales to a frac-
tional value, and can never gain the digital filter
data greater than one.
Once the GAIN registers are written, the USEGR
bit in the FILTCFG register enables gain correc-
tion.
15.2 Offset Correction
Offset correction in the CS5376A cancels the DC
bias of a measurement channel by subtracting the
Output Value = Data * (GAIN / 0x7FFFFF)
Unity Gain: GAIN = 0x7FFFFF
50% Gain: GAIN = 0x3FFFFF
Zero Gain: GAIN = 0x000000
Output Rate 4000 SPS ~ 1 SPS
IIR
Filter
CS5376A
59

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