CS8422-DNZR Cirrus Logic Inc, CS8422-DNZR Datasheet - Page 19

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CS8422-DNZR

Manufacturer Part Number
CS8422-DNZR
Description
IC 24-bit 192kHz SRC S/PDIF Receiver
Manufacturer
Cirrus Logic Inc
Datasheets
DS692PP1
I/OLRCK
I/OSCLK
I/OSCLK
SDOUT
SDOUT
I/OLRCK
SDIN
(input)
(output)
SDIN
(output)
(output)
(input)
(input)
(input)
(output)
Figure 3. Non-TDM Master Mode Timing
Figure 1. Non-TDM Slave Mode Timing
9. Typical base band jitter in accordance with AES-12id-2006 section 3.4.2. Measurements are Time In-
10. OLRCK must remain high for at least 1 OSCLK period and at most 255 OSCLK periods in TDM Mode.
11. In TDM formatted master mode, the OSCLK frequency is fixed at 256*OLRCK.
terval Error (TIE) taken with 3rd order 100 Hz to 40 kHz band-pass filter. Measured with Sample Rate
= 48 kHz.
t
lckd
t
lcks
t
dpd
t
dpd
t
lcks
t
ds
t
ds
t
dh
t
MSB
MSB
dh
t
sckh
MSB
MSB
t
sckl
MSB-1
MSB-1
MSB-1
MSB-1
TDM_IN
OLRCK
OSCLK
SDOUT
(output)
(output)
(output)
(input)
TDM_IN
OLRCK
OSCLK
SDOUT
(output)
(input)
(input)
(input)
t
fsm
t
Figure 4. TDM Master Mode Timing
fss
Figure 2. TDM Slave Mode Timing
t
lrckh
t
fsh
t
dpd
t
dpd
t
ds
t
ds
t
dh
t
t
sckh
dh
MSB
MSB
MSB
MSB
CS8422
t
sckl
MSB-1
MSB-1
MSB-1
MSB-1
19

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