CS8422-DNZR Cirrus Logic Inc, CS8422-DNZR Datasheet - Page 59

• Manufacturer Part Number: CS8422-DNZR
• Description: IC 24-bit 192kHz SRC S/PDIF Receiver
• Manufacturer: Cirrus Logic Inc

DS692PP1
11.20 Interrupt Status (14h)
PCCH
7
CCRC - Channel Status Block Cyclic Redundancy Check bit. Updated on CS block boundaries, valid only
in Pro mode.
UNLOCK - Receiver lock status when sourced by incoming AES3-compatible data. Updated on CS block
boundaries.
V - Received AES3 Validity bit status. Updated on sub-frame boundaries.
CONF - Confidence bit. Updated on sub-frame boundaries.
BIP - Bi-phase error bit. Updated on sub-frame boundaries.
PAR - Parity bit. Updated on sub-frame boundaries.
For all bits in this register, a “1” means the associated interrupt condition has occurred at least once since
the register was last read. A “0” means the associated interrupt condition has NOT occurred since the last
reading of the register. Reading the register resets all bits to 0, unless the interrupt mode is set to level and
the interrupt source is still true. Status bits that are masked off in the associated mask register will always
be “0” in this register.
PCCH – PC burst preamble change.
OSLIP - Serial audio output port data slip interrupt
0 - No error.
1 - Error.
0 - Receiver locked.
1 - Receiver out of lock.
0 - Data is valid and is normally linear coded PCM audio.
1 - Data is invalid, or may be valid compressed audio.
0 - No error.
1 - Confidence error. The input data stream may be near error condition due to jitter degradation.
0 - No error.
1 - Bi-phase error. This indicates an error in the received bi-phase coding.
0 - No error.
1 - Parity error.
Indicates that the PC byte has changed from its previous value. If the IEC61937 bit in the Format Detect
Status register goes high, it will cause a PCCH interrupt even if the PC byte hasn’t changed since the last
time the IEC61937 bit went high.
When the serial audio output port is in slave mode, and OLRCK is asynchronous to the port data source,
this bit will go high every time a data sample is dropped or repeated. See
on page 25
OSLIP
6
for more information.
DETC
5
CCH
4
RERR
3
QCH
2
“Serial Port Clock Operation”
FCH
1
SRC_UNLOCK
CS8422
0
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