DSPIC30F2010-20E/SO Microchip Technology, DSPIC30F2010-20E/SO Datasheet - Page 196

• Manufacturer Part Number: DSPIC30F2010-20E/SO
• Description: IC,DSP,16-BIT,CMOS,SOP,28PIN,PLASTIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F2010-20E/SO

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 20
• Program Memory Size: 12KB (4K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 28-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MIL
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

dsPIC30F2010
PWM Operation During CPU Idle Mode.............................. 89
PWM Operation During CPU Sleep Mode .......................... 89
PWM Output and Polarity Control ....................................... 88
PWM Output Override......................................................... 87
PWM Period ........................................................................ 84
PWM Special Event Trigger ................................................ 89
PWM Time Base ................................................................. 83
PWM Update Lockout ......................................................... 88
Q
QEA/QEB Input Characteristics ........................................ 169
QEI Module
Quadrature Decoder Timing Requirements ...................... 169
Quadrature Encoder Interface (QEI) Module ...................... 75
Quadrature Encoder Interface Interrupts ............................ 78
Quadrature Encoder Interface Logic ................................... 76
R
Reader Response ............................................................. 200
Reset......................................................................... 121, 127
Reset Sequence.................................................................. 39
Reset Timing Characteristics ............................................ 161
Reset Timing Requirements.............................................. 161
Resets
RTSP Operation.................................................................. 44
S
Serial Peripheral Interface. See SPI
Simple Capture Event Mode
Simple OC/PWM Mode Timing Requirements.................. 167
Simple Output Compare Match Mode................................. 72
DS70118J-page 196
Enable Bits .................................................................. 88
Fault States ................................................................. 88
Modes ......................................................................... 88
Output Pin Control ...................................................... 88
Complementary Output Mode ..................................... 87
Synchronization .......................................................... 87
Postscaler ................................................................... 89
Continuous Up/Down Counting Modes ....................... 83
Double Update Mode .................................................. 84
Free Running Mode .................................................... 83
Postscaler ................................................................... 84
Prescaler ..................................................................... 84
Single-Shot Mode ....................................................... 83
External Clock Timing Requirements........................ 165
Index Pulse Timing Characteristics........................... 170
Index Pulse Timing Requirements ............................ 170
Operation During CPU Idle Mode ............................... 78
Operation During CPU Sleep Mode ............................ 77
Register Map............................................................... 79
Timer Operation During CPU Idle Mode ..................... 78
Timer Operation During CPU Sleep Mode.................. 77
Reset Sources ............................................................ 39
BOR, Programmable................................................. 129
POR .......................................................................... 127
POR with Long Crystal Start-up Time ....................... 129
Capture Buffer Operation............................................ 68
Capture Prescaler ....................................................... 68
Hall Sensor Mode ....................................................... 68
Input Capture in CPU Idle Mode ................................. 69
Timer2 and Timer3 Selection Mode ............................ 68
Cycle-by-Cycle.................................................... 88
Latched ............................................................... 88
Operating without FSCM and PWRT ................ 129
Simple PWM Mode ............................................................. 72
Single Pulse PWM Operation ............................................. 87
Software Simulator (MPLAB SIM) .................................... 145
Software Stack Pointer, Frame Pointer .............................. 12
SPI ...................................................................................... 91
SPI Mode
SPI Module ......................................................................... 91
SPI Operation During CPU Idle Mode ................................ 93
SPI Operation During CPU Sleep Mode............................. 93
STATUS Register ............................................................... 12
Subtracter ........................................................................... 16
Symbols used in Opcode Descriptions ............................. 136
System Integration............................................................ 121
T
Temperature and Voltage Specifications
Timer1 Module.................................................................... 57
Timer2 and Timer3 Selection Mode.................................... 72
Timer2/3 Module................................................................. 61
Input Pin Fault Protection ........................................... 72
Period ......................................................................... 73
CALL Stack Frame ..................................................... 27
Slave Select Synchronization ..................................... 93
SPI1 Register Map...................................................... 94
Framed SPI Support ................................................... 92
Operating Function Description .................................. 91
SDOx Disable ............................................................. 91
Timing Characteristics
Timing Requirements
Word and Byte Communication .................................. 91
Data Space Write Saturation ...................................... 18
Overflow and Saturation ............................................. 16
Round Logic ............................................................... 17
Write Back .................................................................. 17
Overview................................................................... 121
Register Map ............................................................ 133
AC............................................................................. 156
DC ............................................................................ 148
16-bit Asynchronous Counter Mode ........................... 57
16-bit Synchronous Counter Mode ............................. 57
16-bit Timer Mode....................................................... 57
Gate Operation ........................................................... 58
Interrupt ...................................................................... 59
Operation During Sleep Mode .................................... 58
Prescaler .................................................................... 58
Real-Time Clock ......................................................... 59
Register Map .............................................................. 60
32-bit Synchronous Counter Mode ............................. 61
32-bit Timer Mode....................................................... 61
ADC Event Trigger...................................................... 64
Gate Operation ........................................................... 64
Interrupt ...................................................................... 64
Operation During Sleep Mode .................................... 64
Register Map .............................................................. 65
Timer Prescaler .......................................................... 64
Master Mode (CKE = 0).................................... 171
Master Mode (CKE = 1).................................... 172
Slave Mode (CKE = 1).............................. 173, 174
Master Mode (CKE = 0).................................... 171
Master Mode (CKE = 1).................................... 172
Slave Mode (CKE = 0)...................................... 173
Slave Mode (CKE = 1)...................................... 175
RTC Interrupts .................................................... 59
RTC Oscillator Operation ................................... 59
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