SL23EP08SI-1 Silicon Laboratories Inc, SL23EP08SI-1 Datasheet

SL23EP08SI-1

Manufacturer Part Number

SL23EP08SI-1

Description

Clock Buffer 10-133MHz 8 Out ZDB 3.3-2.5V Fout=Fin

Manufacturer

Silicon Laboratories Inc

Datasheet

1.SL23EP08ZC-1.pdf (15 pages)

Specifications of SL23EP08SI-1

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

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Download datasheet (221Kb)

Rev 1.0, May 18, 2006

2400 West Cesar Chavez, Austin, TX 78701

Key Features

Applications

Block Diagram

• 10 to 220 MHz operating frequency range

• Low output clock skew: 45ps-typ

• Low output clock jitter:

• Low part-to-part output skew: 90 ps-typ

• Wide 2.5 V to 3.3 V power supply range

• Low power dissipation:

• One input drives 8 outputs

• Multiple configurations and drive options

• Select mode to bypass PLL or tri-state outputs

• SpreadThru™ PLL that allows use of SSCG

• Available in 16-pin SOIC and TSSOP packages

• Available in Commercial and Industrial grades

• Printers, MFPs and Digital Copiers

• PCs and Work Stations

• Routers, Switchers and Servers

• Datacom and Telecom

• High-SpeedDigital Embeded Systems

Low Jitter and Skew 10 to 220 MHz Zero Delay Buffer (ZDB)

 25 ps-typ cycle-to-cycle jitter

 15 ps-typ period jitter

 20 mA-max at 66 MHz and VDD=3.3 V

 18 mA-max at 66 MHz and VDD=2.5V

CLKIN

(Divider for -3 and -4 only)

(Divider for -5H only)

VDD

1+(512) 416-8500

Decoding Logic

Input Selection

Low Power and

Low Jitter

GND

PLL

(Divider for -2 and -3 only)

Description

The SL23EP08 is a low skew, low jitter and low power Zero

Delay Buffer (ZDB) designed to produce up to nine (9) clock

outputs from one (1) reference input clock, for high speed

clock distribution applications.

The product has an on-chip PLL and a feedback pin (FBK)

which can be used to obtain feedback from any one of the

output clocks. The SL23EP08 has two (2) clock driver banks

each with four (4) clock outputs. These outputs are controlled

by two (2) select input pins S1 and S2. When only four (4)

outputs are needed, four (4) bank-B output clock buffers can

be tri-stated to reduce power dissipation and jitter. The select

inputs can also be used to tri-state both banks A and B or

drive them directly from the input bypassing the PLL and

making the product behave like a Non-Zero Delay Buffer

(NZDB). The product also offers various 1X, 2X and 4X

frequency options at the output clocks. Refer to the “Product

Configuration Table” for the details.

The high-drive version operates up to 220MHz and 200MHz at

3.3V and 2.5V power supplies respectively.

Benefits

• Up to eight (8) distribution of input clock

• Standard and High-Dirive levels to control impedance

• Low power dissipation, jitter and skew

• Low cost

level, frequency range and EMI

MUX

1+(512) 416-9669

FBK

CLKA1

CLKA2

CLKA3

CLKA4

CLKB1

CLKB2

CLKB3

CLKB4

www.silabs.com

SL23EP08

Page 1 of 15

Related parts for SL23EP08SI-1

SL23EP08SI-1 Summary of contents

Page 1

Low Jitter and Skew 10 to 220 MHz Zero Delay Buffer (ZDB) Key Features • 220 MHz operating frequency range • Low output clock skew: 45ps-typ • Low output clock jitter:  25 ps-typ cycle-to-cycle jitter  15 ...

Page 2

Pin Configuration Pin Description Pin Pin Name Pin Type Number 1 Input CLKIN 2 Output CLKA1 3 Output CLKA2 4 Power VDD 5 Power GND 6 Output CLKB1 7 Output CLKB2 8 Input S2 9 Input S1 10 Output CLKB3 ...

Page 3

General Description- The SL23EP08 is a low skew, low jitter Zero Delay Buffer with very low operating current. The product includes an on-chip high performance PLL that locks into the input reference clock and produces nine (9) output clock drivers ...

Page 4

Device Feedback From SL23EP08-1 Bank-A or Bank-B SL23EP08-1H Bank-A or Bank-B SL23EP08-2 Bank-A SL23EP08-2 Bank-B SL23EP08-3 Bank-A SL23EP08-3 Bank-B SL23EP08-4 Bank-A or Bank-B SL23EP08-5H Bank-A or Bank-B Notes: 1. Outputs are inverted on SL23EP08-2 and SL23EP08-3 in PLL bypass mode ...

Page 5

Absolute Maximum Ratings Description Supply voltage, VDD All Inputs and Outputs Ambient Operating Temperature Ambient Operating Temperature Storage Temperature Junction Temperature Soldering Temperature ESD Rating (Human Body Model) Operating Conditions: Unless otherwise stated VDD=2.5V to 3.3V and for both C ...

Page 6

DC Electrical Specifications (VDD=3.3V): Unless otherwise stated for both C and I Grades Symbol Description Supply Voltage VDD Input LOW Voltage VIL Input HIGH Voltage VIH Input Leakage Current IIL Input HIGH Current IIH VOL Output LOW Voltage VOH Output ...

Page 7

AC Electrical Specifications: VDD=3.3V+/-10% and 0°C to +70°C Operation (Commercial Grade) Symbol Description FOUT-1 Output Frequency FOUT-2 Output Frequency FOUT-2 Output Frequency DC-1 Duty Cycle. -1, -2, -3,-4,-1H and -5H versions DC-2 Duty Cycle, -1, -2, -3,-4,-1H and -5H versions ...

Page 8

AC Electrical Specifications: VDD=3.3V+/-10% and -40°C to +85°C Operation (Industrial Grade) Symbol Description FOUT-1 Output Frequency FOUT-2 Output Frequency FOUT-2 Output Frequency DC-1 Duty Cycle. -1, -2, -3,-4,-1H and -5H versions DC-2 Duty Cycle, -1, -2, -3,-4,-1H and -5H versions ...

Page 9

AC Electrical Specifications: VDD=2.5V+/-10% and 0°C to +70°C Operation (Commercial Grade) Symbol Description FOUT-1 Output Frequency FOUT-2 Output Frequency FOUT-2 Output Frequency DC-1 Duty Cycle. -1, -2, -3,-4,-1H and -5H versions DC-2 Duty Cycle, -1, -2, -3,-4,-1H and -5H versions ...

Page 10

AC Electrical Specifications: VDD=2.5V+/-10% and -40°C to +85°C Operation (Industrial Grade) Symbol Description FOUT-1 Output Frequency FOUT-2 Output Frequency FOUT-2 Output Frequency DC-1 Duty Cycle. -1, -2, -3,-4,-1H and -5H versions DC-2 Duty Cycle, -1, -2, -3,-4,-1H and -5H versions ...

Page 11

External Components & Design Considerations Typical Application Schematic CLKIN VDD 0.1μF VDD 0.1μF VDD Comments and Recommendations Decoupling Capacitor: A decoupling capacitor of 0.1μF must be used between VDD and VSS pins. Place the capacitor on the component side of ...

Page 12

Switching Waveforms OUTPUT OUTPUT INPUT CLKOUT Any Output Part Any Output Part Rev 1.0, May 18, 2006 VDD/2 VDD Figure 2. Output to Output Skew VDD/2 VDD Figure 3. Input ...

Page 13

Package Drawing and Dimensions 16-Lead TSSOP (4.4mm) 16 Pin 2.900(0.114) 3.100(0.122) 0.850(0.033) 0.950(0.037) 0.190(0.007) 0.300(0.012) 0.650(0.025) BSC Thermal Characteristics Parameter Symbol θ Thermal Resistance θ Junction to Ambient θ θ Thermal Resistance Junction to Case Rev 1.0, May ...

Page 14

Package Drawing and Dimensions (Cont.) 16-Lead SOIC (150 Mil) 16 Pin 0.189(4.800) 0.196(4.978) 0.050(1.270) BSC Thermal Characteristics Parameter Symbol θ Thermal Resistance θ Junction to Ambient θ θ Thermal Resistance Junction to Case Rev 1.0, May 18, 2006 ...

Page 15

... Ordering Information Ordering Number SL23EP08SC-1 SL23EP08SC-1 SL23EP08SC-1T SL23EP08SC-1 SL23EP08SI-1 SL23EP08SI-1 SL23EP08SI-1T SL23EP08SI-1 SL23EP08SC-1H SL23EP08SC-1H SL23EP08SC-1HT SL23EP08SC-1H SL23EP08SI-1H SL23EP08SI-1H SL23EP08SI-1HT SL23EP08SI-1H SL23EP08ZC-1H SL23EP08ZC-1H SL23EP08ZC-1HT SL23EP08ZC-1H SL23EP08ZI-1H SL23EP08ZI-1H SL23EP08ZI-1HT SL23EP08ZI-1H SL23EP08SC-2 SL23EP08SC-2 SL23EP08SC-2T SL23EP08SC-2 SL23EP08SI-2 SL23EP08SI-2 SL23EP08SI-2T SL23EP08SI-2 SL23EP08SC-3 SL23EP08SC-3 SL23EP08SC-3T SL23EP08SC-3 SL23EP08SI-3 ...

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