SL23EP08SI-1 Silicon Laboratories Inc, SL23EP08SI-1 Datasheet - Page 4

no-image

SL23EP08SI-1

Manufacturer Part Number
SL23EP08SI-1
Description
Clock Buffer 10-133MHz 8 Out ZDB 3.3-2.5V Fout=Fin
Manufacturer
Silicon Laboratories Inc
Datasheet

Specifications of SL23EP08SI-1

Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Notes:
1. Outputs are inverted on SL23EP08-2 and SL23EP08-3 in PLL bypass mode when S2=1 and S1=0.
2. Output phase is either 0° or 180° with respect to CLKIN input. If phase integrity is required, use the SL23EP08-2.
Rev 1.0, May 18, 2006
Device
SL23EP08-1
SL23EP08-1H
SL23EP08-2
SL23EP08-2
SL23EP08-3
SL23EP08-3
SL23EP08-4
SL23EP08-5H
-1000
-1500
1500
1000
-500
500
0
Feedback From
Bank-A or Bank-B
Bank-A or Bank-B
Bank-A
Bank-B
Bank-A
Bank-B
Bank-A or Bank-B
Bank-A or Bank-B
-30
-25
Table 3. Available SL23EP08 Configurations
Figure 1. CLKIN Input to CLKA and CLKB Delay
-20
Output Load Difference: FBK Load – CLKA or CLKB Load (pF)
-15
-10
-5
Bank-A Frequency
Reference
Reference
Reference
2x Reference
2X Reference
4X Reference
2X Reference
Reference /2
0
5
10
15
20
25
Bank-B Frequency
Reference
Reference
Reference/2
Reference
Reference
2X Reference
2X Reference
Reference /2
30
SL23EP08
Page 4 of 15
[2]

Related parts for SL23EP08SI-1