MT48LC16M8A2TG-75:G Micron Technology Inc, MT48LC16M8A2TG-75:G Datasheet - Page 64

• Manufacturer Part Number: MT48LC16M8A2TG-75:G
• Description: DRAM Chip SDRAM 128M-Bit 16Mx8 3.3V 54-Pin TSOP-II Tray
• Manufacturer: Micron Technology Inc
• Type: SDRAMr

Specifications of MT48LC16M8A2TG-75:G

• Package: 54TSOP-II
• Density: 128 Mb
• Address Bus Width: 14 Bit
• Operating Supply Voltage: 3.3 V
• Maximum Clock Rate: 133 MHz
• Maximum Random Access Time: 6|5.4 ns
• Operating Temperature: 0 to 70 °C

Figure 48:
PDF: 09005aef8091e66d/Source: 09005aef8091e625
128MSDRAM_2.fm - Rev. N 1/09 EN
DQML, DQMH
COMMAND
A0–A9, A11
BA0, BA1
DQM /
CLK
CKE
A10
DQ
t CMS t CMH
t CKS
READ – DQM Operation
t AS
t AS
t AS
ACTIVE
T0
ROW
ROW
BANK
t CKH
Notes:
t AH
t AH
t AH
t RCD
t CK
1. For this example, BL = 4, and CL = 2.
2. x16: A9 and A11 = “Don’t Care.”
T1
NOP
x8: A11 = “Don’t Care.”
DISABLE AUTO PRECHARGE
ENABLE AUTO PRECHARGE
t CMS
t CL
COLUMN m 2
T2
READ
BANK
t CMH
t CH
CAS Latency
T3
NOP
t
LZ
t AC
64
T4
NOP
t OH
D
t HZ
OUT
m
Micron Technology, Inc., reserves the right to change products or specifications without notice.
T5
NOP
t
LZ
t AC
128Mb: x4, x8, x16 SDRAM
T6
NOP
D
t OH
t AC
OUT
m + 2
©1999 Micron Technology, Inc. All rights reserved.
NOP
T7
Timing Diagrams
D
OUT
t OH
t HZ
m + 3
NOP
T8
DON’T CARE
UNDEFINED