XC5VLX110T-2FFG1738C Xilinx Inc, XC5VLX110T-2FFG1738C Datasheet - Page 171

• Manufacturer Part Number: XC5VLX110T-2FFG1738C
• Description: FPGA Virtex®-5 Family 110592 Cells 65nm (CMOS) Technology 1V 1738-Pin FCBGA
• Manufacturer: Xilinx Inc
• Series: Virtex™-5 LXTr

Specifications of XC5VLX110T-2FFG1738C

• Package: 1738FCBGA
• Family Name: Virtex®-5
• Device Logic Units: 110592
• Typical Operating Supply Voltage: 1 V
• Maximum Number Of User I/os: 680
• Ram Bits: 5455872
• Number Of Logic Elements/cells: 110592
• Number Of Labs/clbs: 8640
• Total Ram Bits: 5455872
• Number Of I /o: 680
• Voltage - Supply: 0.95 V ~ 1.05 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1738-BBGA, FCBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: HW-V5-ML523-FXT-UNI-G-J - BOARD EVAL FOR VIRTEX-5HW-V5-ML523-FXT-UNI-G - BOARD EVAL FOR VIRTEX-5HW-V5-ML523-UNI-G - EVALUATION PLATFORM VIRTEX-5
• Number Of Gates: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Legal Block RAM and FIFO Combinations
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
Block RAM ECC VHDL and Verilog Templates
VHDL and Verilog templates are available in the Libraries Guide.
The block RAM–FIFO combinations shown in
RAMB36 primitive. When placing block RAM and FIFO primitives in the same location,
the FIFO must occupy the lower port.
X-Ref Target - Figure 4-33
RAMB18
RAMB18
Figure 4-33: Legal Block RAM and FIFO Combinations
www.xilinx.com
RAMB18SDP
RAMB18SDP
Legal Block RAM and FIFO Combinations
Figure 4-33
RAMB18
FIFO18
are supported in a single
RAMB18SDP
FIFO18_36
ug0190_4_35_050208
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