CY7C9689A-AC Cypress Semiconductor Corp, CY7C9689A-AC Datasheet - Page 4

• Manufacturer Part Number: CY7C9689A-AC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C9689A-AC

• Lead Free Status / RoHS Status: Not Compliant

Document #: 38-02020 Rev. *D
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Pin Descriptions
68
44, 42,
40, 36,
34, 32,
30, 22
54, 46 TXDATA[9:8]/
58, 56 TXCMD[1:0]
20
Transmit Path Signals
Pin
TXCLK
TXDATA[7:0]
TXCMD[2:3]
TXSC/D
Name
TTL clock input
Internal Pull-up
TTL input, sampled on
TXCLK↑ or REFCLK↑
Internal Pull-up
TTL input, sampled on
TXCLK↑ or REFCLK↑
Internal Pull-up
TTL input, sampled on
TXCLK↑ or REFCLK↑
Internal Pull-up
TTL input, sampled on
TXCLK↑ or REFCLK↑
Internal Pull-up
I/O Characteristics
Transmit FIFO Clock.
Used to sample all Transmit FIFO and related interface signals.
Parallel Transmit DATA Input.
When selected (CE = LOW and TXEN = asserted), information on these inputs
is processed as DATA when TXSC/D is LOW and ignored otherwise. When the
encoder is bypassed (ENCBYP is LOW), TXDATA[7:0] functions as the least
significant eight bits of the 10- or 12-bit pre-encoded transmit character.
When the Transmit FIFO is enabled (FIFOBYP is HIGH), these inputs are
sampled on the rising edge of TXCLK. When the Transmit FIFO is bypassed
(FIFOBYP is LOW) these inputs are captured on the rising edge of REFCLK.
Parallel Transmit DATA or COMMAND Input.
When selected, BYTE8/10 is HIGH, and the encoder is enabled (ENCBYP is
HIGH), information on these inputs are processed as TXCMD[2:3] if TXSC/D is
HIGH and ignored otherwise.
When selected, BYTE8/10 is LOW, and the encoder is enabled (ENCBYP is
HIGH), information on these inputs are processed as TXDATA[9:8] if TXSC/D
is LOW and ignored otherwise.
When the encoder is bypassed (ENCBYP is LOW), TXDATA[9:8] functions as
the 9th and 10th bits of the 10- or 12-bit pre-encoded transmit character.
When the Transmit FIFO is enabled (FIFOBYP is HIGH), these inputs are
sampled on the rising edge of TXCLK. When the Transmit FIFO is bypassed
(FIFOBYP is LOW), these inputs are captured on the rising edge of REFCLK.
Parallel Transmit COMMAND Input.
When selected and the encoder is enabled (ENCBYP is HIGH), information on
these inputs is processed as a COMMAND when TXSC/D is HIGH and ignored
otherwise.
When BYTE8/10 is HIGH and the encoder is bypassed (ENCBYP is LOW), the
TXCMD[1:0] inputs are ignored.
When BYTE8/10 is LOW and when the encoder is bypassed (ENCBYP is
LOW), the TXCMD[1:0] inputs function as the 11th and 12th (MSB) bits of the
12-bit pre-encoded transmit character.
When the Transmit FIFO is enabled (FIFOBYP is HIGH), these inputs are
sampled on the rising edge of TXCLK. When the Transmit FIFO is bypassed
(FIFOBYP is LOW), these inputs are sampled on the rising edge of REFCLK.
COMMAND or DATA input selector.
When selected, BYTE8/10 is HIGH, and the encoder is enabled (ENCBYP is
HIGH), this input selects if the DATA or COMMAND inputs are processed. If
TXSC/D is HIGH, the value on TXCMD[3:0] is captured as one of sixteen
possible COMMANDs, and the data on the TXDATA[7:0] bits are ignored. If
TXSC/D is LOW, the information on TXDATA[7:0] is captured as one of 256
possible 8-bit DATA values, and the information on the TXCMD[3:0] bus is
ignored.
When BYTE8/10 is LOW and the encoder is enabled (ENCBYP is HIGH) this
input selects if the DATA or COMMAND inputs are processed. If TXSC/D is
HIGH, the information on TXCMD[1:0] is captured as one of four possible
COMMANDs, and the information on the TXDATA[9:0] bits are ignored. If
TXSC/D is LOW, the information on TXDATA[9:0] is captured as one of 1024
possible 10-bit DATA values, and the information on the TXCMD[1:0] bus is
ignored.
When the encoder is bypassed (ENCBYP is LOW) TXSC/D is ignored
Signal Description
CY7C9689A
Page 4 of 51
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