PIC18F67K90-E/PT Microchip Technology, PIC18F67K90-E/PT Datasheet - Page 24
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PIC18F67K90-E/PT
Manufacturer Part Number
PIC18F67K90-E/PT
Description
128kB Flash, 4kB RAM, 1kB EE, NanoWatt XLP, LCD 64 TQFP 10x10x1mm TRAY
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet
1.PIC18F66K90-IMR.pdf
(570 pages)
Specifications of PIC18F67K90-E/PT
Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
64-TQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F67K90-E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC18F87K90 FAMILY
TABLE 1-4:
DS39957D-page 24
RB0/INT0/SEG30/FLT0
RB1/INT1/SEG8
RB2/INT2/SEG9/CTED1
RB3/INT3/SEG10/
CTED2/ECCP2/P2A
RB4/KBI0/SEG11
RB5/KBI1/SEG29/T3CKI/
T1G
Legend: TTL = TTL compatible input
Note 1:
RB0
INT0
SEG30
FLT0
RB1
INT1
SEG8
RB2
INT2
SEG9
CTED1
RB3
INT3
SEG10
CTED2
ECCP2
P2A
RB4
KBI0
SEG11
RB5
KBI1
SEG29
T3CKI
T1G
2:
3:
4:
Pin Name
ST
I
P
I
Default assignment for ECCP2 when the CCP2MX Configuration bit is set.
Alternate assignment for ECCP2 when the CCP2MX Configuration bit is cleared.
Not available on PIC18F65K90 and PIC18F85K90 devices.
The CCP6, CCP7, CCP8 and CCP9 pin placement depends on the ECCPMX Configuration bit setting.
2
C™ = I
= Schmitt Trigger input with CMOS levels
= Input
= Power
PIC18F8XK90 PINOUT I/O DESCRIPTIONS (CONTINUED)
2
C/SMBus
Pin Number
TQFP
58
57
56
55
54
53
Type
Pin
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
Analog
Analog
Analog
Analog
Analog
Analog
Buffer
Type
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
PORTB is a bidirectional I/O port. PORTB can be software
programmed for internal weak pull-ups on all inputs.
Digital I/O.
External Interrupt 0.
SEG30 output for LCD.
Enhanced PWM Fault input for ECCP1/2/3.
Digital I/O.
External Interrupt 1.
SEG8 output for LCD.
Digital I/O.
External Interrupt 2.
SEG9 output for LCD.
CTMU Edge 1 input.
Digital I/O.
External Interrupt 3.
SEG10 output for LCD.
CTMU Edge 2 input.
Capture 2 input/Compare 2 output/PWM2 output.
Enhanced PWM2 Output A.
Digital I/O.
Interrupt-on-change pin.
SEG11 output for LCD.
Digital I/O.
Interrupt-on-change pin.
SEG29 output for LCD.
Timer3 clock input.
Timer1 external clock gate input.
CMOS = CMOS compatible input or output
Analog = Analog input
O
OD
= Output
= Open-Drain (no P diode to V
Description
2009-2011 Microchip Technology Inc.
DD
)
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