PIC18F85J50T-I/PT Microchip Technology, PIC18F85J50T-I/PT Datasheet - Page 178
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PIC18F85J50T-I/PT
Manufacturer Part Number
PIC18F85J50T-I/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F65J50-IPT.pdf
(480 pages)
3.PIC18F65J50-IPT.pdf
(16 pages)
Specifications of PIC18F85J50T-I/PT
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
65
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3904 B
Interface Type
I2C, MSSP, SPI, EUSART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
65
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183022, DM183032
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162087 - HEADER MPLAB ICD2 18F87J50 68/84MA180021 - MODULE PLUG-IN 18F87J50 FS USBAC164328 - MODULE SKT FOR 80TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
PIC18F85J50T-I/PTTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F85J50T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- Current page: 178 of 480
- Download datasheet (8Mb)
PIC18F87J50 FAMILY
11.2.5
In the Addressable Parallel Slave Port mode
(
two extra inputs, PMA<1:0>, which are the address
lines 1 and 0. This makes the 4-byte buffer space
directly addressable as fixed pairs of read and write
buffers. As with legacy Buffered mode, data is output
from PMDOUT1L, PMDOUT1H, PMDOUT2L and
PMDOUT2H, and is read in PMDIN1L, PMDIN1H,
PMDIN2L and PMDIN2H. Table 11-2 shows the buffer
addressing for the incoming address to the input and
output registers.
FIGURE 11-6:
DS39775C-page 178
PMMODEH<1:0> = 01), the module is configured with
Master
PMD<7:0>
PMA<1:0>
ADDRESSABLE PARALLEL SLAVE
PORT MODE
PMWR
PMCS
PMRD
PARALLEL MASTER/SLAVE CONNECTION ADDRESSED BUFFER EXAMPLE
Address Bus
Data Bus
Control Lines
PMD<7:0>
PMCS1
PMRD
PMWR
PMA<1:0>
TABLE 11-2:
PMADDR<1:0>
Address
Decode
Write
00
01
10
11
PIC18F Slave
PMDOUT1H (1)
PMDOUT2H (3)
PMDOUT1L (0)
PMDOUT2L (2)
SLAVE MODE BUFFER
ADDRESSING
PMDOUT1H (1)
PMDOUT2H((3)
PMDOUT1L (0)
PMDOUT2L (2)
Register
(Buffer)
Output
© 2009 Microchip Technology Inc.
Address
Decode
Read
PMDIN1H (1)
PMDIN2H (3)
PMDIN1L (0)
PMDIN2L (2)
Input Register
PMDIN1H (1)
PMDIN2H (3)
PMDIN1L (0)
PMDIN2L (2)
(Buffer)
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