PIC18F85J50T-I/PT Microchip Technology, PIC18F85J50T-I/PT Datasheet - Page 250
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PIC18F85J50T-I/PT
Manufacturer Part Number
PIC18F85J50T-I/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F65J50-IPT.pdf
(480 pages)
3.PIC18F65J50-IPT.pdf
(16 pages)
Specifications of PIC18F85J50T-I/PT
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
65
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3904 B
Interface Type
I2C, MSSP, SPI, EUSART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
65
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183022, DM183032
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162087 - HEADER MPLAB ICD2 18F87J50 68/84MA180021 - MODULE PLUG-IN 18F87J50 FS USBAC164328 - MODULE SKT FOR 80TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
PIC18F85J50T-I/PTTR
Available stocks
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Manufacturer
Quantity
Price
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Part Number:
PIC18F85J50T-I/PT
Manufacturer:
Microchip Technology
Quantity:
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PIC18F87J50 FAMILY
19.4.3.4
Unlike 5-Bit Address Masking mode, 7-Bit Address
Masking mode uses a mask of up to 8 bits (in 10-bit
addressing) to define a range of addresses than can be
Acknowledged, using the lowest bits of the incoming
address. This allows the module to Acknowledge up to
127 different addresses with 7-bit addressing, or 255
with 10-bit addressing (see Example 19-3). This mode
is the default configuration of the module, and is
selected when MSSPMSK is unprogrammed (‘1’).
The address mask for 7-Bit Address Masking mode is
stored in the SSPxMSK register, instead of the
SSPxCON2 register. SSPxMSK is a separate hard-
ware register within the module, but it is not directly
addressable. Instead, it shares an address in the SFR
space with the SSPxADD register. To access the
SSPxMSK register, it is necessary to select MSSP
mode, ‘1001’ (SSPCON1<3:0> = 1001), and then read
or write to the location of SSPxADD.
To use 7-Bit Address Masking mode, it is necessary to
initialize SSPxMSK with a value before selecting the
I
sequence of events is:
1.
2.
3.
EXAMPLE 19-3:
DS39775C-page 250
2
C Slave Addressing mode. Thus, the required
7-Bit Addressing:
10-Bit Addressing:
Select
(SSPxCON2<3:0> = 1001).
Write the mask value to the appropriate
SSPADD register address (FC8h for MSSP1,
F6Eh for MSSP2).
Set
(SSPxCON2<3:0> = 0111 for 10-bit addressing,
0110 for 7-bit addressing).
SSPxADD<7:1> = 1010 000
SSPxMSK<7:1> = 1111 001
Addresses Acknowledged = A8h, A6h, A4h, A0h
SSPxADD<7:0> = 1010 0000 (The two MSb are ignored in this example since they are not affected)
SSPxMSK<5:1> = 1111 0
Addresses Acknowledged = A8h, A6h, A4h, A0h
the
7-Bit Address Masking Mode
SSPxMSK
appropriate
ADDRESS MASKING EXAMPLES IN 7-BIT MASKING MODE
I
2
Access
C
Slave
mode
mode
Setting or clearing mask bits in SSPxMSK behaves in
the opposite manner of the ADMSK bits in 5-Bit
Address Masking mode. That is, clearing a bit in
SSPxMSK causes the corresponding address bit to be
masked; setting the bit requires a match in that
position. SSPxMSK resets to all ‘1’s upon any Reset
condition and, therefore, has no effect on the standard
MSSP operation until written with a mask value.
With 7-Bit Address Masking mode, SSPxMSK<7:1>
bits mask the corresponding address bits in the
SSPxADD register. For any SSPxMSK bits that are
active
SSPxADD address bit is ignored (SSPxADD<n> = x).
For the module to issue an address Acknowledge, it is
sufficient to match only on addresses that do not have
an active address mask.
With 10-Bit Address Masking mode, SSPxMSK<7:0>
bits mask the corresponding address bits in the
SSPxADD register. For any SSPxMSK bits that are
active (= 0), the corresponding SSPxADD address bit
is ignored (SSPxADD<n> = x).
Note:
(SSPxMSK<n> = 0),
The two Most Significant bits of the
address are not affected by address
masking.
© 2009 Microchip Technology Inc.
the
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