PIC18F85J50T-I/PT Microchip Technology, PIC18F85J50T-I/PT Datasheet - Page 328
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PIC18F85J50T-I/PT
Manufacturer Part Number
PIC18F85J50T-I/PT
Description
IC,MICROCONTROLLER,8-BIT,PIC CPU,CMOS,TQFP,64PIN,PLASTIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F65J50-IPT.pdf
(480 pages)
3.PIC18F65J50-IPT.pdf
(16 pages)
Specifications of PIC18F85J50T-I/PT
Core Processor
PIC
Core Size
8-Bit
Speed
48MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
65
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3904 B
Interface Type
I2C, MSSP, SPI, EUSART
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
65
Number Of Timers
5
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DV164136, DM183022, DM183032
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 12 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC162087 - HEADER MPLAB ICD2 18F87J50 68/84MA180021 - MODULE PLUG-IN 18F87J50 FS USBAC164328 - MODULE SKT FOR 80TQFP
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
PIC18F85J50T-I/PTTR
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18F85J50T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- Current page: 328 of 480
- Download datasheet (8Mb)
PIC18F87J50 FAMILY
22.5.2
The USB Interrupt Enable register (Register 22-8)
contains the enable bits for the USB status interrupt
sources. Setting any of these bits will enable the
respective interrupt source in the UIR register.
REGISTER 22-8:
DS39775C-page 328
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
U-0
—
USB INTERRUPT ENABLE
REGISTER (UIE)
Unimplemented: Read as ‘0’
SOFIE: Start-of-Frame Token Interrupt Enable bit
1 = Start-of-Frame token interrupt enabled
0 = Start-of-Frame token interrupt disabled
STALLIE: STALL Handshake Interrupt Enable bit
1 = STALL interrupt enabled
0 = STALL interrupt disabled
IDLEIE: Idle Detect Interrupt Enable bit
1 = Idle detect interrupt enabled
0 = Idle detect interrupt disabled
TRNIE: Transaction Complete Interrupt Enable bit
1 = Transaction interrupt enabled
0 = Transaction interrupt disabled
ACTVIE: Bus Activity Detect Interrupt Enable bit
1 = Bus activity detect interrupt enabled
0 = Bus activity detect interrupt disabled
UERRIE: USB Error Interrupt Enable bit
1 = USB error interrupt enabled
0 = USB error interrupt disabled
URSTIE: USB Reset Interrupt Enable bit
1 = USB Reset interrupt enabled
0 = USB Reset interrupt disabled
SOFIE
R/W-0
UIE: USB INTERRUPT ENABLE REGISTER
W = Writable bit
‘1’ = Bit is set
STALLIE
R/W-0
IDLEIE
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
TRNIE
R/W-0
The values in this register only affect the propagation
of an interrupt condition to the microcontroller’s inter-
rupt logic. The flag bits are still set by their interrupt
conditions, allowing them to be polled and serviced
without actually generating an interrupt.
ACTVIE
R/W-0
© 2009 Microchip Technology Inc.
x = Bit is unknown
UERRIE
R/W-0
URSTIE
R/W-0
bit 0
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