DP83934CVUL20 National Semiconductor, DP83934CVUL20 Datasheet - Page 39

• Manufacturer Part Number: DP83934CVUL20
• Manufacturer: National Semiconductor

Specifications of DP83934CVUL20

• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 160
• Lead Free Status / RoHS Status: Not Compliant

6 0 SONIC-T Registers
6 3 1 Command Register (Continued)
Bit
3
2
1
0
RXEN RECEIVER ENABLE
Setting this bit enables the receive buffer management engine to begin buffering data to memory Setting this bit
resets the RXDIS bit Note If this bit is set while the MAC unit is currently receiving a packet both RXEN and RXDIS
are set until the network goes inactive (i e the SONIC-T will not start buffering in the middle of a packet being
received) When both RXEN and RXDIS are set RXEN could be cleared by writing zero to it
RXDIS RECEIVER DISABLE
Setting this bit disables the receiver from buffering data to memory or the Receive FIFO If this bit is set during the
reception of a packet the receiver is disabled only after the packet is processed The RXEN bit is reset when the
receiver is disabled Tally counters remain active regardless of the state of this bit
Note If this bit is set while the SONIC-T is currently receiving a packet both RXEN and RXDIS are set until the packet is fully received When both
TXP TRANSMIT PACKET(S)
Setting this bit causes the SONIC-T to transmit packets which have been set up in the Transmit Descriptor Area
(TDA) The SONIC-T loads its appropriate registers from the TDA then begins transmission The SONIC-T clears
this bit after any of the following conditions have occurred (1) transmission had completed (i e after the SONIC-T
has detected EOL
has occurred This condition occurs when any of the following bits in the TCR have been set EXC EXD FU or BCM
This bit must not be set if a Load CAM operation is in progress (LCAM is set) The SONIC-T will lock up if both bits
are set simultaneously
HTX HALT TRANSMISSION
Setting this bit halts the transmit command after the current transmission has completed TXP is reset after
transmission has halted The Current Transmit Descriptor Address (CTDA) register points to the last descriptor
transmitted The SONIC-T samples this bit after writing to the TXpkt status field
RXEN and RXDIS are set RXDIS could be cleared by writing zero to it
e
1) (2) the Halt Transmission command (HTX) has taken effect or (3) a transmit abort condition
(Continued)
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Description