DP83934CVUL20 National Semiconductor, DP83934CVUL20 Datasheet - Page 88
DP83934CVUL20
Manufacturer Part Number
DP83934CVUL20
Description
Manufacturer
National Semiconductor
Datasheet
1.DP83934CVUL20.pdf
(104 pages)
Specifications of DP83934CVUL20
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (max)
5.25V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
160
Lead Free Status / RoHS Status
Not Compliant
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9 0 AC and DC Specifications
BUS REQUEST TIMING BMODE
Note 1 BGACK is asserted one bus clock after all the signals (AS DSACK0 1 BGACK STERM (Extended bus mode) and BG) meet the T45a setup time (see
Section 5 4 1 for more information) The address bus AS DS ECS MRW USR
Note 2 S
Number
T45a
T51a
T52
T53
T54
T54a
T54b
T55
T55b
k
2 0
l
will indicate IDLE at the end of T2 if the last operation is a read operation or at the end of Th if the last operation is a write operation
BG AS BGACK DSACK0 1 and STERM Asynchronous
Setup Time to BSCK (Note 1)
BSCK to Address AS MRW DS ECS
USR
BSCK to Data TRI-STATE
BSCK to Address AS MRW DS ECS
USR
BSCK Low to BR Low TRI-STATE
BSCK High to BGACK Low High
High to BGACK TRI-STATE
BSCK to Bus Status Valid
S
k
2 0
k
k
1 0
1 0
l
Hold from BSCK
l
l
and EXUSR
and EXUSR
e
1
Parameter
k
k
3 0
3 0
l
l
TRI-STATE
Active (Note 1)
(Continued)
88
k
1 0
l
and EXUSR
Min
7
3
k
20 MHz
3 0
l
will also be driven active on the same clock
Max
37
34
34
26
24
19
29
Min
6
3
25 MHz
Max
35
32
32
24
22
17
27
TL F 11719 – 69
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
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