NAND256W3A2BN6F NUMONYX, NAND256W3A2BN6F Datasheet - Page 25

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NAND256W3A2BN6F

Manufacturer Part Number
NAND256W3A2BN6F
Description
Manufacturer
NUMONYX
Datasheet

Specifications of NAND256W3A2BN6F

Cell Type
NAND
Density
256Mb
Access Time (max)
12us
Interface Type
Parallel
Boot Type
Not Required
Address Bus
25b
Operating Supply Voltage (typ)
3/3.3V
Operating Temp Range
-40C to 85C
Package Type
TSOP
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8b
Number Of Words
32M
Supply Current
20mA
Mounting
Surface Mount
Pin Count
48
Lead Free Status / RoHS Status
Compliant

Available stocks

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Price
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NAND128-A, NAND256-A
Figure 10. Read (A, B, C) operations
Figure 11. Read block diagrams
1. The highest address depends on the device density.
A9-A26 (1)
A9-A26 (1)
A0-A7
A0-A7
and Chip Enable remains Low, then the next page is automatically loaded into the page
buffer and the read operation continues. A sequential row read operation can only be
used to read within a block. If the block changes a new read command must be issued.
Refer to
block diagrams
sequential row read operation, set to High the Chip Enable signal for more than t
Sequential row read is not available when the Chip Enable don’t care option is enabled.
RB
I/O
CL
AL
W
R
E
Read B command, x8 devices
Read A command, x8 devices
(1st half page)
(1st half page)
Figure 12: Sequential row read operations
Command
01h/ 50h
Area A
Area A
Code
00h/
for details about sequential row read operations. To terminate a
(2nd half page)
(2nd half page)
Area B
Area B
Address Input
Area C
(spare)
Area C
(spare)
tBLBH1
(read)
A9-A26 (1)
A0-A2 (x16)
A0-A3 (x8)
A9-A26 (1)
Busy
A0-A7
Read C command, x8/x16 devices
Read A command, x16 devices
A4-A7 (x8), A3-A7 (x16) are don't care
Area A
Data Output (sequentially)
and
(main area)
Figure 13: Sequential row read
Area A
Area A/ B
Device operations
(spare)
Area C
Area C
(spare)
ai07595c
AI07596
EHEL
25/59
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