FW82801EB S L73Z Intel, FW82801EB S L73Z Datasheet - Page 519

• Manufacturer Part Number: FW82801EB S L73Z
• Manufacturer: Intel

Specifications of FW82801EB S L73Z

• Lead Free Status / RoHS Status: Not Compliant

14.1.10
14.1.11
14.1.12
Intel
®
82801EB ICH5 / 82801ER ICH5R Datasheet
SID — Subsystem Identification Register
(SMBUS—D31:F2/F4)
Address Offset:
Default Value:
Lockable:
INT_LN—Interrupt Line Register
(SMBUS—D31:F3)
Address Offset:
Default Value:
INT_PN—Interrupt Pin Register
(SMBUS—D31:F3)
Address Offset:
Default Value:
15:0
Bit
Bit
7:0
Bit
7:0
Subsystem ID (SID) — RO. The SID register, in combination with the SVID register, enables the
operating system (OS) to distinguish subsystems from each other. The value returned by reads to
this register is the same as that which was written by BIOS into the IDE SID register.
Interrupt Line (INT_LN) — R/W. This data is not used by the Intel
software the interrupt line that the interrupt pin is connected to PIRQB#.
Interrupt PIN (INT_PN) — RO.
02h = Indicates that the Intel
2Eh
00h
No
3Ch
00h
3Dh
02h
–
2Fh
®
ICH5 SMBus controller will drive PIRQB# as its interrupt line.
Description
Description
Description
Attribute:
Size:
Power Well:
Attributes:
Size:
Attributes:
Size:
SMBus Controller Registers (D31:F3)
®
ICH5. It is to communicate to
RO
16 bits
Core
R/W
8 bits
RO
8 bits
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