MC13892JVLR2 Freescale, MC13892JVLR2 Datasheet - Page 79

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MC13892JVLR2

Manufacturer Part Number
MC13892JVLR2
Description
Manufacturer
Freescale
Datasheet

Specifications of MC13892JVLR2

Operating Temperature (max)
85C
Operating Temperature (min)
-30C
Mounting
Surface Mount
Package Type
BGA
Case Length
12mm
Screening Level
Commercial
Lead Free Status / RoHS Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC13892JVLR2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
switcher, but the falling slope can be influenced by the load. Additionally, as the current capability in PFM mode is reduced,
controlled DVS transitions in PFM mode could be affected. Critically timed DVS transitions are best assured with PWM mode
operation.
chapter.
increments of 25 mV per 4.0 μs, to allow SPI controlled voltage stepping with SWx[4:0]. Additionally, SW3 and SW4 include
Standby mode set point programmability.
control.
SIDEN = 1. Refer to the SID description below for further details.
SWITCHER INCREMENT / DECREMENT
Process and Temperature Compensation (DPTC) control in support of fine tuning power domains for the processor supply tree.
An increment command will increase the set point voltage by a single 25 mV step. A decrement command will decrease the set
point by a single 25 mV step. The transition time for the step will be the same as programmed with SWxDVSSPEED[1:0] for DVS
stepping. If a switcher runs out of programmable range (in either direction), as constrained by programmable stops, then the
increment or decrement command shall be ignored.
DVS2 pins, from the default toggling between Normal and DVS operating modes, to a jog control mode for the switcher which
DVSx is assigned. Once enabled, the switcher being controlled will start at the Normal mode set point as programmed with
SWx[4:0] and await any jog commands from the processor. The adjustment scheme essentially intercepts the Normal mode set
point SPI bits (i.e., but not DVS or Standby programmed set points), and makes any necessary adjustments based on jog up or
jog down commands. The modified set point bits are then immediately passed to the switching regulator, which would then do a
DVS step in the appropriate direction. The SPI bits containing Normal mode programming are not directly altered.
Analog Integrated Circuit Device Data
Freescale Semiconductor
Since the switchers have a strong sourcing capability but no active sinking capability, the rising slope is determined by the
Note that there is a special mode of DVS control for Switcher Increment / Decrement (SID) operation described later in this
DVS pin controls are not included for SW3 and SW4. However, voltage transitions programmed through the SPI will step in
Figure 20
Note that the DVSx input pins are reconfigured for Switcher Increment / Decrement (SID) control mode when SPI bit
A scheme for incrementing or decrementing the operating set points of SW1 and SW2 is desirable for improved Dynamic
The Switcher Increment / Decrement (SID) function is enabled with SIDEN = 1. This will reassign the function of the DVS1 and
shows the general behavior for the switchers when initiated with pin controlled DVS, SPI programming or standby
Figure 20. SW1 Voltage Stepping with Pin Controlled DVS
Table 50. DVS Speed Selection for SW1 and SW2
00
01 (default)
10
11
SWxDVSSPEED[1:0]
25 mV step each 2.0 μs
25 mV step each 4.0 μs
25 mV step each 8.0 μs
25 mV step each 16 μs
Function
FUNCTIONAL DEVICE OPERATION
SUPPLIES
13892
79

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