MC9S08GB60ACFUE Freescale, MC9S08GB60ACFUE Datasheet - Page 11

• Manufacturer Part Number: MC9S08GB60ACFUE
• Manufacturer: Freescale

Specifications of MC9S08GB60ACFUE

• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 40MHz
• Interface Type: I2C/SCI/SPI
• Total Internal Ram Size: 4KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 1.8/2.08V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 60KB
• Lead Free Status / RoHS Status: Compliant

Section Number
8.3
8.4
8.5
9.1
9.2
9.3
9.4
10.1 Introduction ...................................................................................................................................155
10.2 Features .........................................................................................................................................155
10.3 TPM Block Diagram .....................................................................................................................157
10.4 Pin Descriptions ............................................................................................................................158
10.5 Functional Description ..................................................................................................................158
Freescale Semiconductor
Addressing Modes .........................................................................................................................133
Special Operations .........................................................................................................................135
HCS08 Instruction Set Summary ..................................................................................................138
Introduction ...................................................................................................................................149
Features .........................................................................................................................................149
Register Definition ........................................................................................................................151
Functional Description ..................................................................................................................153
8.3.1
8.3.2
8.3.3
8.3.4
8.3.5
8.3.6
8.4.1
8.4.2
8.4.3
8.4.4
8.4.5
9.1.1
9.2.1
9.3.1
9.3.2
9.4.1
9.4.2
9.4.3
10.4.1 External TPM Clock Sources ........................................................................................158
10.4.2 TPMxCHn — TPMx Channel n I/O Pins ......................................................................158
Inherent Addressing Mode (INH) ..................................................................................133
Relative Addressing Mode (REL) .................................................................................133
Immediate Addressing Mode (IMM) .............................................................................133
Direct Addressing Mode (DIR) .....................................................................................133
Extended Addressing Mode (EXT) ...............................................................................134
Indexed Addressing Mode .............................................................................................134
Reset Sequence ..............................................................................................................135
Interrupt Sequence .........................................................................................................135
Wait Mode Operation ....................................................................................................136
Stop Mode Operation .....................................................................................................136
BGND Instruction ..........................................................................................................137
Port A and Keyboard Interrupt Pins ..............................................................................149
KBI Block Diagram .......................................................................................................151
KBI Status and Control Register (KBI1SC) ..................................................................152
KBI Pin Enable Register (KBI1PE) ..............................................................................153
Pin Enables ....................................................................................................................153
Edge and Level Sensitivity ............................................................................................153
KBI Interrupt Controls ...................................................................................................154
8.3.6.1
8.3.6.2
8.3.6.3
8.3.6.4
8.3.6.5
8.3.6.6
8.3.6.7
Indexed, No Offset (IX) ................................................................................134
Indexed, No Offset with Post Increment (IX+) ............................................134
Indexed, 8-Bit Offset (IX1) ...........................................................................134
Indexed, 8-Bit Offset with Post Increment (IX1+) .......................................134
Indexed, 16-Bit Offset (IX2) .........................................................................134
SP-Relative, 8-Bit Offset (SP1) ....................................................................134
SP-Relative, 16-Bit Offset (SP2) ..................................................................135
Keyboard Interrupt (S08KBIV1)
Timer/PWM (S08TPMV1)
MC9S08GB60A Data Sheet, Rev. 2
Chapter 10
Chapter 9
Title
Page
11