MC9S08GB60ACFUE Freescale, MC9S08GB60ACFUE Datasheet - Page 123

• Manufacturer Part Number: MC9S08GB60ACFUE
• Manufacturer: Freescale

Specifications of MC9S08GB60ACFUE

• Cpu Family: HCS08
• Device Core Size: 8b
• Frequency (max): 40MHz
• Interface Type: I2C/SCI/SPI
• Total Internal Ram Size: 4KB
• # I/os (max): 56
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 2.5/3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 1.8/2.08V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: LQFP
• Program Memory Type: Flash
• Program Memory Size: 60KB
• Lead Free Status / RoHS Status: Compliant

In this particular case, the MCU has been attached to a PCB and the entire assembly is undergoing final
test with automated test equipment. A separate signal or message is provided to the MCU operating under
user provided software control. The MCU initiates a trim procedure as outlined in
tester supplies a precision reference signal.
If the intended bus frequency is near the maximum allowed for the device, it is recommended to trim using
a reduction divisor (R) twice the final value. Once the trim procedure is complete, the reduction divisor
can be restored. This will prevent accidental overshoot of the maximum clock frequency.
7.5
Refer to the direct-page register summary in
address assignments for all ICG registers. This section refers to registers and control bits only by their
names. A Freescale-provided equate or header file is used to translate these names into the appropriate
absolute addresses.
Freescale Semiconductor
Initial conditions:
1) Clock supplied from ATE has 500 μs duty period
2) ICG configured for internal reference with 4 MHz bus
ICG Registers and Control Bits
INCREASES THE FREQUENCY)
(DECREASING ICGTRM
ICGTRM - 128 / (2**n)
COUNT < EXPECTED = 500
(RUNNING TOO SLOW)
ICGTRM =
n = n + 1
IS n > 8?
MC9S08GB60A Data Sheet, Rev. 2
Figure 7-11. Trim Procedure
(COUNT = # OF BUS CLOCKS / 4)
DECREASES THE FREQUENCY)
NO
START TRIM PROCEDURE
INCOMING CLOCK WIDTH
(INCREASING ICGTRM
ICGTRM = $80, n = 1
ICGTRM + 128 / (2**n)
CASE STATEMENT
Chapter 4,
ICGTRM =
MEASURE
YES
.
COUNT > SZZEXPECTED = 500
(RUNNING TOO FAST)
“Memory” of this data sheet for the absolute
COUNT = EXPECTED = 500
Internal Clock Generator (S08ICGV2)
Figure 7-11
STORE ICGTRM VALUE
IN NON-VOLATILE
CONTINUE
MEMORY
while the
123