LMX2541SQE3320E/NOPB National Semiconductor, LMX2541SQE3320E/NOPB Datasheet - Page 48

• Manufacturer Part Number: LMX2541SQE3320E/NOPB
• Description: IC PLL FREQ SYNTH W/VCO 36LLP
• Manufacturer: National Semiconductor
• Series: PowerWise®r
• Type: Clock/Frequency Synthesizer (RF)r

Specifications of LMX2541SQE3320E/NOPB

• Pll: Yes
• Input: Clock
• Output: Clock
• Number Of Circuits: 1
• Ratio - Input:output: 2:2
• Differential - Input:output: No/No
• Frequency - Max: 3.6GHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 3.15 V ~ 3.45 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 36-LLP
• Frequency-max: 3.6GHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: LMX2541SQE3320ETR

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In the previous table, consider the case of operating in integer mode with ORDER=0. For this case, lock detect can theoretically
work for all VCO frequencies provided that the phase detector frequency does not violate the maximum possible value. For instance,
it would be an invalid condition to operate in integer mode with a VCO frequency of 900 MHz and a phase detector frequency of
100 MHz because 100 MHz exceeds the limit of 900 MHz/12 = 75 MHz. If the phase detector was lowered to 75 MHz to meet this
restriction, then this condition would be valid provided that the window size was programmed to be 9.5 ns or less.
Consider another example of a 400 MHz VCO frequency with a fourth order modulator. Because the minimum window size of 20
ns is above the maximum programmable value of 13.5 ns, digital lock detect can not be used in this configuration. If the modulator
order was reduced to 2nd order, then it would function provided that the phase detector frequency was less 30.8 MHz.
FSK - Frequency Shift Keying
This bit enables a binary FSK modulation mode using the PLL N counter. Consult the applications section for more details.
2.6 REGISTER R2
This word contains all the bits of the fractional denominator. These bits apply if the device is being used fractional mode.
PLL_DEN[21:0] -- Fractional Denominator
These bits determine the fractional denominator.
Denominator
Fractional
4194303
...
0
0
1
.
0
1
.
0
1
.
0
1
.
0
1
.
0
1
.
FSK
0
1
0
1
.
0
1
.
0
1
.
48
0
1
PLL_DEN[21:0]
.
0
1
.
0
1
.
FSK Mode
Disabled
Enabled
0
1
.
0
1
.
0
1
.
0
1
.
0
1
.
0
1
.
0
1
.
0
1
.
0
1
.
0
1
.