LTC1090CN Linear Technology, LTC1090CN Datasheet - Page 17

IC DATA ACQUIS SYS 10BIT 20-DIP

LTC1090CN

Manufacturer Part Number
LTC1090CN
Description
IC DATA ACQUIS SYS 10BIT 20-DIP
Manufacturer
Linear Technology
Type
Data Acquisition System (DAS), ADCr
Datasheet

Specifications of LTC1090CN

Resolution (bits)
10 b
Sampling Rate (per Second)
30k
Data Interface
Serial
Voltage Supply Source
Dual ±
Voltage - Supply
5V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Through Hole
Package / Case
20-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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APPLICATIO S I FOR ATIO
Parallel Port Microprocessors
When interfacing the LTC1090 to an MPU which has a
parallel port, the serial signals are created on the port with
software. Three MPU port lines are programmed to create
the CS, SCLK and D
port line reads the D
Intel 8051/8052/80C252 family.
Intel 8051
To interface to the 8051, the LTC1090 is programmed for
MSB first format and 10-bit word length. The 8051 gener-
ates CS, SCLK and D
on the fourth.
D
R2
R3
*B9 is MSB in unipolar or sign bit in bipolar
OUT
Hardware and Software Interface to Intel 8051 Processor
ANALOG
INPUTS
from LTC1090 stored in 8051 RAM
OUTPUT PORT
MSB*
B9
B1 B0
SERIAL DATA
2 1 0
MPU
B8 B7 B6 B5 B4 B3 B2
LTC1090
LSB
U
SCLK
ACLK
IN
D
IN
OUT
0
OUT
D
CS
IN
signals for the LTC1090. A fourth
on three port lines and reads D
0
line. An example is made of the
U
3
3
0
Figure 5. Several LTC1090’s Sharing One 3-Wire Serial Interface
8 CHANNELS
0
LTC1090
P1.1
P1.2
P1.3
P1.4
ALE
W
8051
0
0
CS
U
3
8 CHANNELS
OUT
LTC1090
CONTINUE: MOV A,#0DH
LOOP:
DELAY:
CS
3
MNEMONIC
MOV PI,#02H
CLR P1.3
SETB P1.4
CLR P1.4
MOV R4,#08
NOP
MOV C, P1.1
RLC A
MOV P1.2, C
SETB P1.3
CLR P1.3
DJNZ R4, LOOP
MOV R2, A
MOV C, P1.1
CLR A
RLC A
SETB P1.3
CLR P1.3
MOV C, P1.1
RRC A
RRC A
MOV R3, A
SETB P1.3
CLR P1.3
SETB P1.4
MOV R5,#07H
DJNZ R5, DELAY
AJMP CONTINUE
8 CHANNELS
LTC1090
LTC1090 • AI14
8051 Code
CS
3-WIRE SERIAL
INTERFACE TO OTHER
PERIPHERALS OR LTC1090s
DESCRIPTION
Initialize port 1 (bit 1 is made
an input)
SCLK goes low
CS goes high
D
placed in ACC.
CS goes low
Load counter
Delay for deglitcher
Read data bit into carry
Rotate data bit into ACC
Output D
SCLK goes high
SCLK goes low
Next bit
Store MSBs in R2
Read data bit into carry
CIear ACC
Rotate data bit into ACC
SCLK goes high
SCLK goes low
Read data bit into carry
Rotate right into ACC
Rotate right into ACC
Store LSBs in R3
SCLK goes high
SCLK goes low
CS goes high
Load counter
Delay for LTC1090 to perform
conversion
Repeat program
IN
word for the LTC1090 is
IN
LTC1090
bit to LTC1090
17
1090fc

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