LTC1090CN Linear Technology, LTC1090CN Datasheet - Page 24

IC DATA ACQUIS SYS 10BIT 20-DIP

LTC1090CN

Manufacturer Part Number
LTC1090CN
Description
IC DATA ACQUIS SYS 10BIT 20-DIP
Manufacturer
Linear Technology
Type
Data Acquisition System (DAS), ADCr
Datasheet

Specifications of LTC1090CN

Resolution (bits)
10 b
Sampling Rate (per Second)
30k
Data Interface
Serial
Voltage Supply Source
Dual ±
Voltage - Supply
5V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Through Hole
Package / Case
20-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LTC1090CN
Manufacturer:
LT
Quantity:
2 200
Part Number:
LTC1090CN#PBF
Manufacturer:
Linear Technology
Quantity:
135
TYPICAL APPLICATIO
LTC1090
Sneak-A-Bit Code for the LTC1090 Using the MC68HC05C4
24
SNEAK-A-BIT Code
D
Location $77
Location $87
D
D
D
D
V
V
IN
IN
2ND CONVERSION
OUT
IN
IN
IN
IN
1ST CONVERSION
words for LTC1090
1
2
3
from LTC1090 in MC68HC05C4 RAM
LDA
STA
LDA
STA
BSET 0, $02
JSR
JSR
JSR
JSR
MNEMONIC
( + ) CH6
( – ) CH7
( – ) CH6
( + ) CH7
#$50
$0A
#$FF
$06
READ–/+
READ+/–
READ–/+
CHK SIGN
0
0
0
(ODD/SIGN)
5V
0V
Sign
MUX Addr.
B10
B2
0
1
0
–5V
1ST CONVERSION
1024 STEPS
0V
SNEAK-A-BIT
B9
B1
Configuration data for SPCR
Load configuration data into $0A
Configuration data for port C DDR
Load configuration data into port C DDR
Make sure CS is high
Dummy read configures LTC1090 for next
read
Read CH6 with respect to CH7
Read CH7 with respect to CH6
Determines which reading has valid data,
converts to 2’s complement and stores in
RAM
1
1
1
B8
B0
LSB
2ND CONVERSION
1024 STEPS
1
1
1
B7
UNI
DESCRIPTION
1
1
1
U
B6
SOFTWARE
filled with 0s
MSBF
B5
1
1
1
B4
–5V
1
1
1
Length
5V
0V
Word
B3
V
IN
LTC1090 • TA05
1
1
1
2047 STEPS
Sneak-A-Bit Code for the LTC1090 Using the MC68HC05C4
READ–/+: LDA
READ+/–: LDA
TRANSFER: BCLR 0, $02
LOOP 1:
LOOP 2:
CHK SIGN: LDA
MINUS:
END:
MNEMONIC
JSR
LDA
STA
LDA
STA
RTS
JSR
LDA
STA
LDA
STA
RTS
STA
TST
BPL
LDA
STA
STA
TST
BPL
BSET 0, $02
LDA
STA
RTS
ORA $74
BEQ
CLC
ROR $73
ROR $74
LDA
STA
LDA
STA
BRA END
CLC
ROR $71
ROR $72
COM $71
COM $72
LDA
ADD #$01
STA
CLRA
ADC $71
STA
STA
LDA
STA
RTS
#$3F
TRANSFER Read LTC1090 routine
$60
$71
$61
$72
#$7F
TRANSFER Read LTC1090 routine
$60
$73
$61
$74
$0C
$0B
LOOP 1
$0C
$0C
$60
$0B
LOOP 2
$0C
$61
$73
MINUS
$73
$77
$74
$87
$72
$72
$71
$77
$72
$87
Load D
Load MSBs from LTC1090 into ACC
Store MSBs in $71
Load LSBs from LTC1090 into ACC
Store LSBs in $72
Return
Load D
Load MSBs from LTC1090 into ACC
Store MSBs in $73
Load LSBs from LTC1090 into ACC
Store LSBs in $74
Return
CS goes low
Load D
Test status of SPlF
Loop to previous instruction if not done
Load contents of SPI data reg into ACC
Start next cycle
Store MSBs in $60
Test status of SPlF
Loop to previous instruction if not done
CS goes high
Load contents of SPI data reg into ACC
Store LSBs in $61
Return
Load MSBs of +/– read into ACC
Or ACC (MSBs) with LSBs of +/– read
If result is 0 goto minus
Clear carry
Rotate right $73 through carry
Rotate right $74 through carry
Load MSBs of +/– read into ACC
Store MSBs in RAM location $77
Load LSBs of +/– read into ACC
Store LSBs in RAM location $87
Goto end of routine
Clear carry
Shift MSBs of – /+ read right
Shift LSBs of – /+ read right
1’s complement of MSBs
1’s complement of LSBs
Load LSBs into ACC
Add 1 to LSBs
Store ACC in $72
Clear ACC
Add with carry to MSBs. Result in ACC
Store ACC in $71
Store MSBs in RAM location $77
Load LSBs in ACC
Store LSBs in RAM location $87
Return
DESCRIPTION
IN
IN
IN
word for LTC1090 into ACC
word for LTC1090 into ACC
into SPI. Start transfer
1090fc

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