SC1200UCL-266 AMD (ADVANCED MICRO DEVICES), SC1200UCL-266 Datasheet - Page 22

• Manufacturer Part Number: SC1200UCL-266
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of SC1200UCL-266

• Lead Free Status / Rohs Status: Not Compliant

2.1.2
The GX1 module communicates with the Core Logic mod-
ule via a Fast-PCI bus that can work at up to 66 MHz. The
Fast-PCI bus is internal for the SC1200/SC1201 processor
and is connected to the General Configuration Block (see
Section 4.0 on page 71 for details on the General Configu-
ration Block).
This bus supports seven bus masters. The requests
(REQs) are fixed in priority. The seven bus masters in order
of priority are:
1)
2)
3)
4)
5)
6)
7)
2.1.3
The GX1 module generates display timing, and controls
internal signals CRT_VSYNC and CRT_HSYNC of the
Video Processor module.
The GX1 module interfaces with the Video Processor via a
video data bus and a graphics data bus.
• Video data. The GX1 module uses the core clock,
• Graphics data. The GX1 module uses the internal
For more information about the GX1 module’s interface to
the Video Processor, see the “Display Controller” chapter
in the AMD Geode™ GX1 Processor Data Book.
2.2
The Video Processor provides high resolution and graphics
for a CRT, TV, or TFT/DSTN interface. The following sub-
sections provide a summary of how the Video Processor
interfaces with the other modules of the SC1200/SC1201
processor. For detailed information about the Video Pro-
cessor, see Section 7.0 on page 311.
22
divided by 2 or 4 (typically 100 to 133 MHz). It drives the
video data using this clock. Internal signals VID_VAL
and VID_RDY are used as data-flow handshake signals
between the GX1 module and the Video Processor.
DCLK signal, supplied by the PLL of the Video
Processor, to drive the 18-bit graphics-data bus of the
Video Processor. Each six bits of this bus define a
different color. Each of these 6-bit color definitions is
expanded (by adding two zero LSB lines) to form an
8-bit bus, at the Video Processor.
VIP
IDE Channel 0
IDE Channel 1
Audio
USB
External REQ0#
External REQ1#
Fast-PCI Bus
Display
Video Processor Module
32579B
2.2.1
The Video Processor is connected to the GX1 module in
the following way:
• The Video Processor’s DOTCLK output signal is used as
• The GX1 module’s PCLK output signal is used as the
2.2.2
The Video Input Port (VIP) within the Video Processor con-
tains a standard interface that is typically connected to a
media processor or TV encoder. The clock is supplied by
the externally connected device; typically at 27 MHz.
Video input can be sent to the GX1 module’s video frame
buffer (Capture Video mode) or can be used directly (Direct
Video mode).
2.2.3
The Video Processor interfaces to the Core Logic module
for accessing PCI function configuration registers.
2.2.4
The Video Processor drives three CRT DACs with up to
135M pixels per second.
The interface for these DACs can be monitored via external
balls of the SC1200/SC1201 processor. For more informa-
tion, see Section 3.4.4 "CRT/TFT Interface Signals" on
page 52.
2.3
The Core Logic module is described in detail in Section 6.0
on page 141.
The Core Logic module is connected to the Fast-PCI bus. It
uses signal AD28 as the IDSEL for all PCI configuration
functions except for USB which uses AD29.
2.3.1
The following interfaces of the Core Logic module are
implemented via external signals of the SC1200/SC1201
processor. Each interface is listed below with a reference to
the descriptions of the relevant signals.
• IDE: See Section 3.4.10 "IDE Interface Signals" on page
• AC97: See Section 3.4.15 "AC97 Audio Interface
• PCI: See Section 3.4.7 "PCI Bus Interface Signals" on
the GX1 module’s DCLK input signal.
GFXCLK input signal of the Video Processor.
61.
Signals" on page 65.
page 55.
AMD Geode™ SC1200/SC1201 Processor Data Book
GX1 Module Interface
Video Input Port
Core Logic Module Interface
CRT DAC
Core Logic Module
Other Core Logic Module Interfaces
Architecture Overview