SC1200UCL-266 AMD (ADVANCED MICRO DEVICES), SC1200UCL-266 Datasheet - Page 288

• Manufacturer Part Number: SC1200UCL-266
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of SC1200UCL-266

• Lead Free Status / Rohs Status: Not Compliant

288
Note:
Offset 18h-1Bh
Offset 1Ch-1Fh
Offset 20h-23h
Offset 24h-27h
Offset 28h-2Bh
Offset 2Ch-2Fh
Offset 30h-33h
Offset 34h-37h
30:16
15:14
31:8
31:4
31:4
31:4
31:4
31:4
31:4
13:0
Bit
7:0
3:0
3:0
3:0
3:0
3:0
3:0
31
2
1
0
Writing a 1 to a bit in this register clears the corresponding bit, while writing a 0 to a bit leaves the bit unchanged.
Description
StartOfFrameEnable.
0: Ignore.
1: Disable interrupt generation due to Start of Frame.
WritebackDoneHeadEnable.
0: Ignore.
1: Disable interrupt generation due to Writeback Done Head.
SchedulingOverrunEnable.
0: Ignore.
1: Disable interrupt generation due to Scheduling Overrun.
HCCA. Pointer to HCCA base address.
Reserved. Read/Write 0s.
PeriodCurrentED. Pointer to the current Periodic List ED.
Reserved. Read/Write 0s.
ControlHeadED. Pointer to the Control List Head ED.
Reserved. Read/Write 0s.
ControlCurrentED. Pointer to the current Control List ED.
Reserved. Read/Write 0s.
BulkHeadED. Pointer to the Bulk List Head ED.
Reserved. Read/Write 0s.
BulkCurrentED. Pointer to the current Bulk List ED.
Reserved. Read/Write 0s.
DoneHead. Pointer to the current Done List Head ED.
Reserved. Read/Write 0s.
FrameIntervalToggle (Read Only). This bit is toggled by HCD when it loads a new value into FrameInterval.
FSLargestDataPacket (Read Only). This field specifies a value which is loaded into the Largest Data Packet Counter at
the beginning of each frame.
Reserved. Read/Write 0s.
FrameInterval. This field specifies the length of a frame as (bit times - 1). For 12,000 bit times in a frame, a value of 11,999
is stored here.
Table 6-42. USB_BAR+Memory Offset: USB Controller Registers (Continued)
32579B
HcControlCurrentED Register (R/W)
HcPeriodCurrentED Register (R/W)
HcControlHeadED Register (R/W)
HcBulkCurrentED Register (R/W)
HcBulkHeadED Register (R/W)
HcDoneHead Register (R/W)
HcFmInterval Register (R/W)
HcHCCA Register (R/W)
Core Logic Module - USB Controller Registers - PCIUSB
AMD Geode™ SC1200/SC1201 Processor Data Book
Reset Value = 00002EDFh
Reset Value = 00000000h
Reset Value = 00000000h
Reset Value = 00000000h
Reset Value = 00000000h
Reset Value = 00000000h
Reset Value = 00000000h
Reset Value = 00000000h