PEB20571FV3.1XT Infineon Technologies, PEB20571FV3.1XT Datasheet - Page 138

• Manufacturer Part Number: PEB20571FV3.1XT
• Manufacturer: Infineon Technologies

Specifications of PEB20571FV3.1XT

• Lead Free Status / Rohs Status: Compliant

Polling means that the DSP is polled to see if it has anything to send by way of a frame
which is actually a question. The GHDLC simply receives this frame and passes it on to
the DSP like any other.
Note: This mode is not supported by the DELIC-LC.
When using Collision Detection many GHDLCs may start transmitting at the same time.
Suppose that several GHDLCs start transmitting simultaneously, the first byte
transmitted is always a flag which is common to every GHDLC. Afterwards each GHDLC
transmits it’s address which is, of course, unique to each GHDLC. When a difference is
discovered between the transmitted bit (LTxD) and the collision bit (LCxD), the
transmission is aborted. The GHDLC will try to send the message again after it has
detected the bus to be idle for a specified time, according to it’s class. Arbitration on a
line is such that the GHDLC channel with the lowest address gets the highest priority.
All the GHDLC channels are divided up into two groups: classes 8, 9 and classes 10, 11.
Initially the DSP programs each channel to be either class 8 or 10. If during transmission
a bit collision occurs the GHDLC will have to count 8 consecutive ones (in class 8) or 10
consecutive ones (in class 10) before it tries to retransmit. After a certain GHDLC
channel succeeds in making a full transmission it’s class is increased by 1 to 9 or 11 so
that if a bit collision occurs the GHDLC channel will have to count more ones before
retransmitting. After the GHDLC channel has counted 9 or 11 consecutive ones it’s class
is brought back down to it’s former level (see ITU-T 1.430 section 6.1.4).
Collision Detection in Point-to-Multi Point Configuration
The GHDLC can perform a bus access procedure and collision detection. As a result,
any number of HDLC controllers can be assigned to one physical channel, where they
perform statistical multiplexing. When a mismatch between a transmitted bit and the bit
on CxD is detected, the GHDLC stops sending further data and an idle is transmitted. As
soon as it detects the transmit bus to be idle again, the GHDLC automatically attempts
to re-transmit its frame. The DSP programs the HDLC its class and the HDLC performs
a priority mechanism to detect idle on the line.
Data Sheet
121
Functional Description
PEB 20570
PEB 20571
2003-07-31