PEB20570FV31XP Lantiq, PEB20570FV31XP Datasheet - Page 122

• Manufacturer Part Number: PEB20570FV31XP
• Manufacturer: Lantiq

Specifications of PEB20570FV31XP

• Lead Free Status / Rohs Status: Compliant

4.4.1
Figure 41
The PCM-unit signals share port pins with the GHDLC-unit. A multiplexer controlled by
register MUXCTRL allows to define the required functionality.
4.4.1.1
The main task of the PCMU is the serial-to-parallel conversion of incoming data to a
parallel data format (and vice versa) which is directly read by the DSP. This access is
required for the DSP to perform switching.
The data conversion in the PCMU is done by frame-wise swapping based on a circular
buffer structure (see also
the PCMU (I-buffer) and the other one to the DSP (D-buffer). At the end of every frame
the buffers are swapped.
4.4.1.2
The logical partitioning of each frame buffer into input and output blocks is determined
according to the requested data rate as shown in the table below.
Data Sheet
TRANSIU
IOM Unit
HDLC
Unit
PCMU Functional and Operational Description
Frame-Wise Buffer Swapping
DSP Inaccessible Buffer (I-buffer)
PCMU Integration in DELIC
Figure
35). During each 8 kHz frame one buffer is assigned to
DSP OAK
Memory
PCM Unit
GHDLC
Unit
105
+
MUX
Functional Description
PCM interface
TSC3
RXD3, TXD3
PDC, PFS
TSC2
RXD0, TXD0, TSC0
RXD1, TXD1, TSC1
RXD2, TXD2
PEB 20570
PEB 20571
2003-07-31