PEB20570FV31XP Lantiq, PEB20570FV31XP Datasheet - Page 50

PEB20570FV31XP

Manufacturer Part Number
PEB20570FV31XP
Description
Manufacturer
Lantiq
Datasheet

Specifications of PEB20570FV31XP

Lead Free Status / Rohs Status
Compliant
Table 14
Pin
No.
79
71
86
83
.
Data Sheet
Symbol In (I)
TSC1 /
LTSC3/
LRTS3
RxD3 /
LCxD3/
LCTS3
TxD3 /
LCLK3
TSC3
PCM Interface Ports 0 ... 3 / LNC Ports 2 ... 3 (DELIC-PB) (cont’d)
Out (O)
O
I
I
O
I/O
O
During
Reset
PLL
Power-
Down
strap
pull-up
refer to
Page 38
I
weak
low
TEST(1)
strap
refer to
Page 38
After
Reset
H
I
weak
low
H
33
Function
PCM Tristate Control Port 1
Supplies a control signal for an external
driver (’low’ when the corresponding TxD-
output is valid).
LNC3 Tristate Control / Request to Send
2 modes per S/W selectable:
1) TxD output is valid (HDLC mode).
Supplies a control signal for an external
driver. (’low’ when the corresponding TxD-
output is valid).
2) ’request-to-send’ functionality
(Async mode)
PCM Receive Data Port 3
LNC3 Collision Data
2 modes per S/W selectable:
1) Collision Data (HDLC Mode).
2) ’clear-to-send’ functionality
(Async mode)
PCM Transmit Data Port 3
LNC External Clock Port 3
When configured as output may be driven
at the following frequencies: 2.048 MHz,
4.096 MHz, 8.192 MHz, 16.384 MHz
PCM Tristate Control Port 3
Supplies a control signal for an external
driver (’low’ when the corresponding TxD
output is valid).
Pin Description
PEB 20570
PEB 20571
2003-07-31

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